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ADF4001 数据表(PDF) 7 Page - Analog Devices |
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ADF4001 数据表(HTML) 7 Page - Analog Devices |
7 / 17 page REV. ADF4001 –7– ANALOG LOCK DETECT DIGITAL LOCK DETECT R COUNTER OUTPUT N COUNTER OUTPUT SDOUT DGND DVDD CONTROL MUXOUT MUX Figure 6. MUXOUT Circuit Lock Detect MUXOUT can be programmed for two types of lock detect: digital lock detect and analog lock detect. Digital lock detect is active high. When LDP in the R counter latch is set to 0, digital lock detect is set high when the phase error on three consecutive phase detector cycles is less than 15 ns. With LDP set to 1, five consecutive cycles of less than 15 ns are required to set the lock detect. It will stay set high until a phase error of greater than 25 ns is detected on any subsequent PD cycle. The N-channel open-drain analog lock detect should be operated with an external pull-up resistor of 10 k Ω nominal. When lock has been detected, this output will be high with narrow low-going pulses. INPUT SHIFT REGISTER The ADF4001 digital section includes a 24-bit input shift regis- ter, a 14-bit R counter, and a 13-bit N counter. Data is clocked into the 24-bit shift register on each rising edge of CLK. The data is clocked in MSB first. Data is transferred from the shift register to one of four latches on the rising edge of LE. The destination latch is determined by the state of the two control bits (C2, C1) in the shift register. These are the two LSBs, DB1 and DB0, as shown in the timing diagram of Figure 1. The truth table for these bits is shown in Table I. Table II shows a sum- mary of how the latches are programmed. Table I. C2, C1 Truth Table Control Bits C2 C1 Data Latch 00 R Counter 01 N Counter 10 Function Latch 11 Initialization Latch Table II. ADF4001 Family Latch Summary REFERENCE COUNTER LATCH DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 C2 (0) C1 (0) R1 R2 R3 R4 R5 R7 R14 ABP1 T2 LDP R13 R6 CONTROL BITS ABP2 T1 DB21 R12 R11 R10 DB22 DB23 R8 R9 RESERVED TEST MODE BITS ANTI- BACKLASH WIDTH 14-BIT REFERENCE COUNTER XX X DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 C2 (1) C1 (1) F1 PD1 M1 M2 M3 F3 CPI1 CPI2 CPI5 CPI6 TC4 PD2 F2 CONTROL BITS MUXOUT CONTROL CURRENT SETTING 1 TIMER COUNTER CONTROL CPI3 CPI4 DB21 CURRENT SETTING 2 TC3 TC2 TC1 DB22 DB23 F4 F5 RESERVED X = DON’T CARE XX DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 C2 (0) C1 (1) N1 N8 N9 N12 N13 N7 G1 CONTROL BITS N10 N11 DB21 N6 N5 N4 DB22 DB23 N2 N3 RESERVED CP GAIN RESERVED 13-BIT N COUNTER XX XX X X X X DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 C2 (1) C1 (0) F1 PD1 M1 M2 M3 F3 CPI1 CPI2 CPI5 CPI6 TC4 PD2 F2 CONTROL BITS MUXOUT CONTROL CURRENT SETTING 1 TIMER COUNTER CONTROL CPI3 CPI4 DB21 CURRENT SETTING 2 TC3 TC2 TC1 DB22 DB23 F4 F5 RESERVED XX N COUNTER LATCH FUNCTION LATCH INITIALIZATION LATCH B |
类似零件编号 - ADF4001_15 |
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类似说明 - ADF4001_15 |
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