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AD9985A 数据表(PDF) 8 Page - Analog Devices |
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AD9985A 数据表(HTML) 8 Page - Analog Devices |
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8 / 32 page  AD9985A Rev. 0 | Page 8 of 32 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 2 GREEN <7> 3 GREEN <6> 4 GREEN <5> 7 GREEN <2> 6 GREEN <3> 5 GREEN <4> 1 GND 8 GREEN <1> 9 GREEN <0> 10 GND 12 BLUE <7> 13 BLUE <6> 14 BLUE <5> 15 BLUE <4> 16 BLUE <3> 17 BLUE <2> 18 BLUE <1> 19 BLUE <0> 20 GND 11 VDD 59 58 57 54 55 56 60 53 52 VD REF BYPASS SDA RIN A0 SCL GND GND VD 51 VD 49 SOGIN 48 GIN 47 GND 46 VD 45 VD 44 GND 43 BIN 42 VD 41 GND 50 GND 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 PIN 1 AD9985A TOP VIEW (Not to Scale) Figure 2. Pin Configuration Table 4. Complete Pinout List Pin Type Mnemonic Function Value Pin No. Inputs RIN Analog Input for Converter R 0.0 V to 1.0 V 54 GIN Analog Input for Converter G 0.0 V to 1.0 V 48 B B IN Analog Input for Converter B 0.0 V to 1.0 V 43 HSYNC Horizontal SYNC Input 3.3 V CMOS 30 VSYNC Vertical SYNC Input 3.3 V CMOS 31 SOGIN Input for Sync-on-Green 0.0 V to 1.0 V 49 CLAMP Clamp Input (External Clamp Signal) 3.3 V CMOS 38 COAST PLL Coast Signal Input 3.3 V CMOS 29 Outputs Red [7:0] Outputs of Converter Red, Bit 7 is the MSB 3.3 V CMOS 70 to 77 Green [7:0] Outputs of Converter Green, Bit 7 is the MSB 3.3 V CMOS 2 to 9 Blue [7:0] Outputs of Converter Blue, Bit 7 is the MSB 3.3 V CMOS 12 to 19 DATACK Data Output Clock 3.3 V CMOS 67 HSOUT HSYNC Output (Phase-Aligned with DATACK) 3.3 V CMOS 66 VSOUT VSYNC Output (Phase-Aligned with DATACK) 3.3 V CMOS 64 SOGOUT Sync-on-Green Slicer Output 3.3 V CMOS 65 References REF BYPASS Internal Reference Bypass 1.25 V 58 MIDSCV Internal Midscale Voltage Bypass 37 FILT Connection for External Filter Components for Internal PLL 33 |
类似零件编号 - AD9985A_15 |
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类似说明 - AD9985A_15 |
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