AD7711A_15 datasheet(6/28 Pages) AD

部件名	AD7711A

功能描述	LC MOS Signal Conditioning ADC

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制造商	AD [Analog Devices]

网页	http://www.analog.com

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REV. D

AD7711A

–6–

Limit at TMIN, TMAX

Parameter

(A, S Versions)

Unit

Conditions/Comments

External Clocking Mode

fSCLK

fCLK IN/5

MHz max

Serial Clock Input Frequency

t20

0

ns min

DRDY to RFS Setup Time

t21

0

ns min

DRDY to RFS Hold Time

t22

2

¥ tCLK IN

ns min

A0 to

RFS Setup Time

t23

0

ns min

A0 to

RFS Hold Time

t24

7

4

¥ tCLK IN

ns max

Data Access Time (

RFS Low to Data Valid)

t25

7

10

ns min

SCLK Falling Edge to Data Valid Delay

2

¥ tCLK IN + 20

ns max

t26

2

¥ tCLK IN

ns min

SCLK High Pulse Width

t27

2

¥ tCLK IN

ns min

SCLK Low Pulse Width

t28

tCLK IN + 10

ns max

SCLK Falling Edge to

DRDY High

t29

8

10

ns min

SCLK to Data Valid Hold Time

tCLK IN + 10

ns max

t30

10

ns min

RFS/TFS to SCLK Falling Edge Hold Time

t31

8

5

¥ tCLK IN/2 + 50

ns max

RFS to Data Valid Hold Time

t32

0

ns min

A0 to

TFS Setup Time

t33

0

ns min

A0 to

TFS Hold Time

t34

4

¥ tCLK IN

ns min

SCLK Falling Edge to

TFS Hold Time

t35

2

¥ tCLK IN – SCLK High

ns min

Data Valid to SCLK Setup Time

t36

30

ns min

Data Valid to SCLK Hold Time

NOTES

7These numbers are measured with the load circuit of Figure 1 and defined as the time required for the output to cross 0.8 V or 2.4 V.

8These numbers are derived from the measured time taken by the data output to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then

extrapolated back to remove effects of charging or discharging the 100 pF capacitor. This means that the times quoted in the timing characteristics are the true bus

relinquish times of the part and as such are independent of external bus loading capacitances.

Specifications subject to change without notice.

TO OUTPUT

100pF

200 A

1.6mA

2.1V

Figure 1. Load Circuit for Access Time and Bus

Relinquish Time

PIN CONFIGURATION

DIP and SOIC

TOP VIEW

(Not to Scale)

24

23

22

21

20

19

18

17

16

15

14

13

1

2

3

4

5

6

7

8

9

10

11

12

AD7711A

AVDD

VSS

AIN1(–)

SCLK

MCLK IN

MCLK OUT

A0

AIN1(+)

MODE

SYNC

VBIAS

REF IN(–)

REF IN(+)

REF OUT

RTD CURRENT

DGND

DVDD

SDATA

DRDY

AGND

TFS

RFS

AIN2(–)

AIN2(+)

TIMING CHARACTERISTICS (continued)

类似零件编号 - AD7711A_15

制造商	部件名	数据表	功能描述
Analog Devices	AD7711AAR	222Kb / 27P	LC2MOS Signal Conditioning ADC with RTD Current Source REV. C
	AD7711AN	242Kb / 28P	LC2MOS Signal Conditioning ADC with RTD Excitation Currents REV. F
	AD7711AN	301Kb / 28P	LC2MOS Signal Conditioning ADC with RTD Excitation Currents REV. G
	AD7711AN	301Kb / 28P	LC2MOS Signal Conditioning ADC with RTD Excitation Currents REV. G
	AD7711AN	354Kb / 29P	Signal Conditioning ADC

More results

类似说明 - AD7711A_15

制造商	部件名	数据表	功能描述
Analog Devices	AD7711	301Kb / 28P	LC MOS Signal Conditioning ADC REV. G
	AD7712	258Kb / 28P	Signal Conditioning ADC REV. F
	AD7711	354Kb / 29P	Signal Conditioning ADC
	AD7714	349Kb / 41P	Signal Conditioning ADC
	AD7710	220Kb / 28P	Signal Conditioning ADC REV. F
	AD7710ANZ	265Kb / 32P	Signal Conditioning ADC REV. G
	AD7712	304Kb / 29P	Signal Conditioning ADC
	AD7710	319Kb / 33P	Signal Conditioning ADC
	AD7710AR-REEL7	265Kb / 32P	Signal Conditioning ADC REV. G
	AD7714	298Kb / 40P	Signal Conditioning ADC REV. C

More results

AD7711A 数据表(PDF) 6 Page - Analog Devices

AD7711A 数据表(HTML) 6 Page - Analog Devices

类似零件编号 - AD7711A_15

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AD7711A 数据表(PDF) 6 Page - Analog Devices

AD7711A 数据表(HTML) 6 Page - Analog Devices

类似零件编号 - AD7711A_15

类似说明 - AD7711A_15

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