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L6520 数据表(PDF) 11 Page - STMicroelectronics

部件名 L6520
功能描述  Highly integrated ballast controller for TL and CFL
Download  19 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6520 数据表(HTML) 11 Page - STMicroelectronics

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L6520, L6521
Functions description
Doc ID 16998 Rev 3
11/19
5.6
Current control circuit (CCC)
The current control circuit (CCC) is a sophisticated circuit able to protect the ballast against
any possible failure. It limits the maximum lamp voltage during ignition (OCPH), overcurrent
protection (OCPL) during run mode, chokes saturation control (CSC) and hard switching
protection (HSP). The control circuit senses the voltage on HBCS pin and PWM_det pin.
Figure 3 on page 13 shows the CCC protections active in each operating mode (preheating,
ignition and run):
5.6.1
Hard switching protection (HSP)
If the voltage on PWM_det pin is higher than 2.35 V at the moment the LS driver turns on,
an up-down event counter is increased and an internal timer is started. Without hard
switching events, the counter decreases at every cycle and the timer is reset when 0 is
reached. If the events counter value is higher than 0 after 200 ms from the detection of the
first event, then the IC is turned off (latched).
5.6.2
Overcurrent protection (OCPH) during ignition mode
The protection results in lamp voltage limitation during ignition. In this phase three
thresholds are active (THL, THM and THH):
If the first threshold is crossed the frequency is increased by 1 kHz during the next cycle.
The interval between the crossings of the two lower thresholds (THL and THM) is used as
an indication of the slope of the half bridge current: if this interval is longer than t1 = 510 ns
the event is considered “slow” and the frequency is increased by another 1 kHz/cycle during
the next cycle. If the interval is shorter than t1 = 510 ns but longer than t2 = 255 ns, the
event is considered “fast” and the frequency is increased by another 2 kHz/cycle during the
next cycle.
If no further threshold crossing is detected, the frequency is decreased with a fixed rate
equal to dfCCC/dt = - 500 Hz/ms, until the frequency at which the lowest threshold was
crossed firstly is reached; then, the decreasing ratio becomes again dfIGN/dt.
If the run frequency has not been reached within 200 ms after the lower threshold was
crossed the first time, the IC is turned off (latched).
A leading edge blanking of 255 ns is active.
5.6.3
Overcurrent protection (OCPL) during run mode
The behavior of the OCPL is similar to the OCPH but with reduced thresholds (TLL, TLM
and TLH) since the current involved in this phase is smaller. If no further threshold crossing
is detected, the frequency is decreased with a fixed rate equal to dfCCC/dt = - 500 Hz/ms,
until the run frequency is reached.
If the run frequency has not been reached after 200 ms from when the lower threshold was
crossed the first time, the IC is turned off (latched).
A leading edge blanking of 255 ns is active.


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