TL16C752B-EP

SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007

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Table 1. Software Flow Control Options EFR[0:3]

BIT 3

BIT 2

BIT 1

BIT 0

Tx, Rx SOFTWARE FLOW CONTROLS

0

0

X

X

No transmit flow control

1

0

X

X

Transmit Xon1, Xoff1

0

1

X

X

Transmit Xon2, Xoff2

1

1

X

X

Transmit Xon1, Xon2: Xoff1, Xoff2

X

X

0

X

No receive flow control

X

X

1

0

Receiver compares Xon1, Xoff1

X

X

0

0

Receiver compares Xon2, Xoff2

1

0

1

1

Transmit Xon1, Xoff1

Receiver compares Xon1 and Xon2, Xoff1 and Xoff2

0

1

1

1

Transmit Xon2, Xoff2

Receiver compares Xon1 and Xon2, Xoff1 and Xoff2

1

1

1

1

Transmit Xon1, Xon2: Xoff1, Xoff2

Receiver compares Xon1 and Xon2: Xoff1 and Xoff2

0

0

1

1

No transmit flow control

Receiver compares Xon1 and Xon2: Xoff1 and Xoff2

RX

When software flow control operation is enabled, the TL16C752B compares incoming data with Xoff1/2

Xoff characters are received, transmission is halted after completing transmission of the current character. Xoff

detection also sets IIR[4] (if enabled via IER[5]) and causes INT to go high.

To resume transmission an Xon1/2 character must be received (in certain cases Xon1 and Xon2 must be

received sequentially). When the correct Xon characters are received IIR[4] is cleared and the Xoff interrupt

disappears.

NOTE

If a parity, framing, or break error occurs while receiving a software flow control character,

this character is treated as normal data and is written to the RCV FIFO.

TX

Xoff1/2 characters are transmitted when the RX FIFO has passed the HALT trigger level programmed in

TCR[3:0].

Xon1/2 characters are transmitted when the RX FIFO reaches the RESUME trigger level programmed in

TCR[7:4].

An important note here is that if, after an xoff character has been sent and software flow control is disabled, the

UART transmits Xon characters automatically to enable normal transmission to proceed. A feature of the

TL16C752B UART design is that if the software flow combination (EFR[3:0]) changes after an Xoff has been

sent, the originally programmed Xon is automatically sent. If the RX FIFO is still above the trigger level, the newly

programmed Xoff1/2 is transmitted.

The transmission of Xoff/Xon(s) follows the exact same protocol as transmission of an ordinary byte from the

FIFO. This means that even if the word length is set to be 5, 6, or 7 characters then the 5, 6, or 7 least significant

bits of Xoff1,2/Xon1,2 is transmitted. (Note that the transmission of 5, 6, or 7 bits of a character is seldom done,

but this functionality is included to maintain compatibility with earlier designs.)

It is assumed that software flow control and hardware flow control are never enabled simultaneously. Figure 4

shows an example of software flow control.

(1)

When pairs of Xon/Xoff characters are programmed to occur sequentially, received Xon1/Xoff1 characters must be written to the Rx

FIFO if the subsequent character is not Xon2/Xoff2.

8

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