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AD6655 数据表(PDF) 2 Page - Analog Devices

部件名 AD6655
功能描述  IF Diversity Receiver
Download  84 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6655 数据表(HTML) 2 Page - Analog Devices

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AD6655
Data Sheet
Rev. B | Page 2 of 84
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Product Highlights ........................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
General Description......................................................................... 4
Specifications..................................................................................... 5
ADC DC Specifications—AD6655-80/AD6655-105 .............. 5
ADC DC Specifications—AD6655-125/AD6655-150 ............ 6
ADC AC Specifications—AD6655-80/AD6655-105............... 7
ADC AC Specifications—AD6655-125/AD6655-150............. 8
Digital Specifications—AD6655-80/AD6655-105................... 9
Digital Specifications—AD6655-125/AD6655-150............... 11
Switching Specifications—AD6655-80/AD6655-105............ 13
Switching Specifications—AD6655-125/AD6655-150 ......... 14
Timing Specifications ................................................................ 15
Absolute Maximum Ratings.......................................................... 18
Thermal Characteristics ............................................................ 18
ESD Caution................................................................................ 18
Pin Configurations and Function Descriptions ......................... 19
Equivalent Circuits......................................................................... 23
Typical Performance Characteristics ........................................... 24
Theory of Operation ...................................................................... 29
ADC Architecture ...................................................................... 29
Analog Input Considerations.................................................... 29
Voltage Reference ....................................................................... 31
Clock Input Considerations...................................................... 32
Power Dissipation and Standby Mode..................................... 34
Digital Outputs ........................................................................... 35
Digital Downconverter .................................................................. 37
Downconverter Modes .............................................................. 37
Numerically Controlled Oscillator (NCO) ............................. 37
Half-Band Decimating Filter and FIR Filter........................... 37
fADC/8 Fixed-Frequency NCO ................................................... 37
Numerically Controlled Oscillator (NCO) ................................. 38
Frequency Translation ............................................................... 38
NCO Synchronization ............................................................... 38
Phase Offset................................................................................. 38
NCO Amplitude and Phase Dither.......................................... 38
Decimating Half-Band Filter and FIR filter................................ 39
Half-Band Filter Coefficients.................................................... 39
Half-Band Filter Features .......................................................... 39
Fixed-Coefficient FIR Filter...................................................... 39
Synchronization.......................................................................... 40
Combined Filter Performance.................................................. 40
Final NCO ................................................................................... 40
ADC Overrange and Gain Control.............................................. 41
Fast Detect Overview................................................................. 41
ADC Fast Magnitude................................................................. 41
ADC Overrange (OR)................................................................ 42
Gain Switching............................................................................ 42
Signal Monitor ................................................................................ 44
Peak Detector Mode................................................................... 44
RMS/MS Magnitude Mode....................................................... 44
Threshold Crossing Mode......................................................... 45
Additional Control Bits ............................................................. 45
DC Correction............................................................................ 45
Signal Monitor SPORT Output ................................................ 46
Channel/Chip Synchronization.................................................... 47
Serial Port Interface (SPI).............................................................. 48
Configuration Using the SPI..................................................... 48
Hardware Interface..................................................................... 48
Configuration Without the SPI ................................................ 49
SPI Accessible Features.............................................................. 49
Memory Map .................................................................................. 50
Reading the Memory Map Register Table............................... 50
Memory Map Register Table..................................................... 51
Memory Map Register Description ......................................... 55
Applications Information .............................................................. 59
Design Guidelines ...................................................................... 59
Evaluation Board ............................................................................ 61
Power Supplies............................................................................ 61
Input Signals................................................................................ 61
Output Signals ............................................................................ 61
Default Operation and Jumper Selection Settings................. 62
Alternative Clock Configurations............................................ 62
Alternative Analog Input Drive Configuration...................... 63
Schematics................................................................................... 64


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