数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD5533B 数据表(PDF) 8 Page - Analog Devices

部件名 AD5533B
功能描述  32-Channel Precision Infinite Sample-and-Hold
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD5533B 数据表(HTML) 8 Page - Analog Devices

Back Button AD5533B_15 Datasheet HTML 4Page - Analog Devices AD5533B_15 Datasheet HTML 5Page - Analog Devices AD5533B_15 Datasheet HTML 6Page - Analog Devices AD5533B_15 Datasheet HTML 7Page - Analog Devices AD5533B_15 Datasheet HTML 8Page - Analog Devices AD5533B_15 Datasheet HTML 9Page - Analog Devices AD5533B_15 Datasheet HTML 10Page - Analog Devices AD5533B_15 Datasheet HTML 11Page - Analog Devices AD5533B_15 Datasheet HTML 12Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 16 page
background image
REV. A
–8–
AD5533B
PIN FUNCTION DESCRIPTIONS
Pin
Function
AGND (1–2)
Analog GND Pins
AVCC (1–2)
Analog Supply Pins. Voltage range from 4.75 V to 5.25 V.
VDD (1–4)
VDD Supply Pins. Voltage range from 8 V to 16.5 V.
VSS (1–4)
VSS Supply Pins. Voltage range from –4.75 V to –16.5 V.
DGND
Digital GND Pins
DVCC
Digital Supply Pins. Voltage range from 2.7 V to 5.25 V.
DAC_GND (1–2)
Reference GND Supply for all the DACs
REF_IN
Reference Voltage for Channels 0–31
REF_OUT
Reference Output Voltage
VOUT (0–31)
Analog Output Voltages from the 32 Channels
VIN
Analog Input Voltage
A4–A1
1, A02
Parallel Interface. 5-address pins for 32 channels. A4 = MSB of channel address. A0 = LSB.
CAL
1
Parallel Interface. Control input that allows all 32 channels to acquire VIN simultaneously.
CS/SYNC
This pin is both the active low chip select pin for the parallel interface and the frame synchronization pin for
the serial interface.
WR1
Parallel Interface. Write pin. Active low. This is used in conjunction with the
CS pin to address the device
using the parallel interface.
OFFSET_SEL
1
Parallel Interface. Offset select pin. Active high. This is used to select the offset channel.
SCLK
2
Serial Clock Input for Serial Interface. This operates at clock speeds up to 20 MHz.
DIN
2
Data Input for Serial Interface. Data must be valid on the falling edge of SCLK.
DOUT
Output from the DAC Registers for Readback. Data is clocked out on the rising edge of SCLK and is valid
on the falling edge of SCLK.
SER/
PAR1
This pin allows the user to select whether the serial or parallel interface will be used. If the pin is tied low,
the parallel interface will be used. If it is tied high, the serial interface will be used.
OFFS_IN
Offset Input. The user can supply a voltage here to offset the output span. OFFS_OUT can also be tied to
this pin if the user wants to drive this pin with the offset channel.
OFFS_OUT
Offset Output. This is the acquired/programmed offset voltage that can be tied to the OFFS_IN pin to
offset the span.
BUSY
This output tells the user when the input voltage is being acquired. It goes low during acquisition and
returns high when the acquisition operation is complete.
TRACK/RESET2
If this input is held high, VIN is acquired once the channel is addressed. While it is held low, the input to the
gain/offset stage is switched directly to VIN. The addressed channel begins to acquire VIN on the rising edge
of
TRACK. See TRACK Input section for further information. This input can also be used as a means of
resetting the complete device to its power-on-reset conditions. This is achieved by applying a low going
pulse of between 90 ns and 200 ns to this pin. See section on
RESET Function for further details.
NOTES
1Internal pull-down devices on these logic inputs. Therefore, they can be left floating and will default to a logic low condition.
2Internal pull-up devices on these logic inputs. Therefore, they can be left floating and will default to a logic high condition.


类似零件编号 - AD5533B_15

制造商部件名数据表功能描述
logo
Analog Devices
AD5533BBC-1 AD-AD5533BBC-1 Datasheet
443Kb / 16P
   32-Channel, 14-Bit DAC with Precision Infinite Sample-and-Hold Mode
REV. A
AD5533BBC-1 AD-AD5533BBC-1 Datasheet
353Kb / 16P
   32-Channel Precision Infinite Sample-and-Hold
REV. A
More results

类似说明 - AD5533B_15

制造商部件名数据表功能描述
logo
Analog Devices
AD5533B AD-AD5533B Datasheet
353Kb / 16P
   32-Channel Precision Infinite Sample-and-Hold
REV. A
AD5533 AD-AD5533 Datasheet
224Kb / 16P
   32-Channel Infinite Sample-and-Hold
REV. 0
AD5533 AD-AD5533_15 Datasheet
288Kb / 16P
   32-Channel Infinite Sample-and-Hold
REV. A
AD5532B AD-AD5532B Datasheet
443Kb / 16P
   32-Channel, 14-Bit DAC with Precision Infinite Sample-and-Hold Mode
REV. A
logo
Maxim Integrated Produc...
DS4303 MAXIM-DS4303 Datasheet
421Kb / 8P
   Voltage Sample and Infinite Hold
Rev 0; 3/05
DS4305 MAXIM-DS4305 Datasheet
229Kb / 8P
   Sample-and-Infinite Hold Voltage Reference
Rev 0; 1/06
logo
Linear Technology
LF398S8 LINER-LF398S8 Datasheet
144Kb / 2P
   Precision Sample and Hold Amplifier?
LF198A LINER-LF198A Datasheet
1Mb / 16P
   Precision Sample and Hold Amplifier
LF398S8 LINER-LF398S8_15 Datasheet
156Kb / 2P
   Precision Sample and Hold Amplifier
logo
Intersil Corporation
HA1-5330-5 INTERSIL-HA1-5330-5 Datasheet
283Kb / 5P
   650ns Precision Sample and Hold Amplifier
June 2004
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com