Data Sheet M13633EJ7V0DS00

8

MC-4532DA726

Synchronous Characteristics

Parameter

Symbol

-A 80

-A 10

Unit

Note

MIN.

MAX.

MIN.

MAX.

Clock cycle time

/CAS latency = 3

8

(125 MHz)

10

(100 MHz)

ns

/CAS latency = 2

10

(100 MHz)

13

(77 MHz)

ns

Access time from CLK

/CAS latency = 3

66

ns

1

/CAS latency = 2

67

ns

1

Input clock frequency

50

125

50

100

MHz

Input CLK duty cycle

40

60

40

60

%

Data-out hold time

/CAS latency = 3

33

ns

1

/CAS latency = 2

33

ns

1

Data-out low-impedance time

00

ns

Data-out high- impedance time

/CAS latency = 3

36

36

ns

/CAS latency = 2

36

37

ns

Data-in setup time

22

ns

Data-in hold time

11

ns

Address setup time

22

ns

Address hold time

11

ns

CKE setup time

22

ns

CKE hold time

11

ns

CKE setup time (Power down exit)

22

ns

Command (/CS0, /CS2, /RAS, /CAS, /WE, DQMB0 -

22

ns

DQMB7) setup time

Command (/CS0, /CS2, /RAS, /CAS, /WE, DQMB0 -

11

ns

DQMB7) hold time

Note 1. Output load

Output

Z = 50

Ω

50 pF

Remark These specifications are applied to the monolithic device.