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TLC14MF4A-100 数据表(PDF) 2 Page - Texas Instruments |
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TLC14MF4A-100 数据表(HTML) 2 Page - Texas Instruments |
2 / 15 page TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagram 6 AGND 8 FILTER OUT 5 φ2 φ1 Butterworth Fourth-Order Low-Pass Filter Nonoverlapping Clock Generator 2 CLKR 1 CLKIN 3 LS Level Shift FILTER IN Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION AGND 6 I Analog ground. The noninverting input to the operational amplifiers of the Butterworth fourth-order low-pass filter. CLKIN 1 I Clock in. CLKIN is the clock input terminal for CMOS-compatible clock or self-clocking options. For either option, LS is at VCC – . For self-clocking, a resistor is connected between CLKIN and CLKR and a capacitor is connected from CLKIN to ground. CLKR 2 I Clock R. CLKR is the clock input for a TTL-compatible clock. For a TTL clock, LS is connected to midsupply and CLKIN can be left open, but it is recommended that it be connected to either VCC+ or VCC – . FILTER IN 8 I Filter input FILTER OUT 5 O Butterworth fourth-order low-pass filter output LS 3 I Level shift. LS accommodates the various input clocking options. For CMOS-compatible clocks or self-clocking, LS is at VCC – and for TTL-compatible clocks, LS is at midsupply. VCC+ 7 I Positive supply voltage terminal VCC – 4 I Negative supply voltage terminal |
类似零件编号 - TLC14MF4A-100 |
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类似说明 - TLC14MF4A-100 |
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