TSB43Ex4x

www.ti.com

SLLA275C – APRIL 2008 – REVISED FEBRUARY 2010

IEEE 1394a-2000 CONSUMER ELECTRONICS SOLUTION

Data Sheet Extract, Rev 1.2

1

FEATURES

•

IEEE 1394 Features

•

External CPU Interfaces

–

Integrated 400/200/100-Mbps 2-Port/3-Port

–

Motorola 68K-Style 16-Bit Asynchronous

PHY

Interface

–

Compliant to IEEE Std 1394-1995 and

–

SRAM-Like 16-Bit Asynchronous Interface

IEEE Std 1394a-2000

–

PCI Interface (33 MHz) Compliant to PCI

–

Supports Bus Manager Functions and

Specification Version 3.0 (Supports PCI

Automatic 1394 Self-ID Verification

Slave and Master Function)

–

Separate Asynchronous ACK Buffers

•

DMA

Decrease ACK-Tracking Burden on External

–

Higher Asynchronous Throughput With

CPU

DMA Hardware Enhancements (Available in

•

DTCP and AES Encryption Support for

PCI Mode Only)

MPEG-DVB and DSS(TSB43EA42/43 and

–

Internal DMA Controller – Asynchronous,

TSB43EC42/43 Only)

Asynchronous Stream TX/RX

–

DTCP Encryption Support on IEEE Std 1394

–

General DMA

Bus

–

Auto Response DMA for SBP2

–

AES128 Encryption Support on HSDI Path

Transactions

(TSB43EC42/43 Only)

•

Data Buffers

–

Support for up to Two Encrypted/Decrypted

–

2 x 4K-Byte Isochronous Buffers for Video

Streams at One Time

Data

–

Full or Restricted AKE Performed With

–

2 x 2K-Byte Asynchronous/Asynchronous

Hardware Assist

Stream Transmit Buffers

–

Secure Loading of DTCP and AES128

–

2 x 2K-Byte Asynchronous/Asynchronous

Information Using External CPU Interface

Stream Receive Buffers

–

Localization Support Compliant With DTCP

–

1 x 1K-Byte Self-ID Buffer

Draft Revision 1.51

–

Insertion Buffers for MPEG-DVB/DSS

•

Video Interfaces

Packet Insertion

–

Two Configurable High-Speed Data Ports

–

Programmable Data/Space Available

for Video Data

Indicators for Buffer Flow Control

–

One Port Configurable As Parallel Or

Serial

–

One Port Serial Only

–

Pass-Through Modes for HSDI0 and HSDI1

–

Packet Insertion – Two Insertion Buffers

per HSDI for PAT, PMT, SIT, and DIT

Packets

–

PID Filtering (32 PID Filters per HSDI Port)

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2008–2010, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.