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CS51311 数据表(PDF) 11 Page - Cherry Semiconductor Corporation |
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CS51311 数据表(HTML) 11 Page - Cherry Semiconductor Corporation |
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11 / 19 page  Application Information: continued 11 Number of capacitors = , where ESRCAP = maximum ESR per capacitor (specified in manufacturer’s data sheet); ESRMAX = maximum allowable ESR. The actual output voltage deviation due to ESR can then be verified and compared to the value assigned by the design- er: ∆VESR = ∆IOUT × ESRMAX Similarly, the maximum allowable ESL is calculated from the following formula: ESLMAX = , where ∆I/∆T = load current slew rate (as high as 20A/µs); ∆VESL = change in output voltage due to ESL. The actual maximum allowable ESL can be determined by using the equation: ESLMAX = , where ESLCAP = maximum ESL per capacitor (it is estimat- ed that a 10 × 12mm Aluminum Electrolytic capacitor has approximately 4nH of package inductance). The actual output voltage deviation due to the actual maxi- mum ESL can then be verified: ∆VESL = . The designer now must determine the change in output voltage due to output capacitor discharge during the tran- sient: ∆VCAP = , where ∆tTR = the output voltage transient response time (assigned by the designer); ∆VCAP = output voltage deviation due to output capaci- tor discharge; ∆I = Load step. The total change in output voltage as a result of a load cur- rent transient can be verified by the following formula: ∆VOUT = ∆VESR + ∆VESL + ∆VCAP Step 3: Selection of the Duty Cycle, Switching Frequency, Switch On-Time (TON) and Switch Off-Time (TOFF) The duty cycle of a buck converter (including parasitic losses) is given by the formula: Duty Cycle = D = , where VOUT = buck regulator output voltage; VHFET = high side FET voltage drop due to RDS(ON); VL = output inductor voltage drop due to inductor wire DC resistance; VDROOP = droop (current sense) resistor voltage drop; VIN = buck regulator input voltage; VLFET = low side FET voltage drop due to RDS(ON). Step3a: Calculation of Switch On-Time The switch On-Time (time during which the switching MOSFET in a synchronous buck topology is conducting) is determined by: TON = , where FSW = regulator switching frequency selected by the designer. Higher operating frequencies allow the use of smaller inductor and capacitor values. Nevertheless, it is common to select lower frequency operation because a higher fre- quency results in lower efficiency due to MOSFET gate charge losses. Additionally, the use of smaller inductors at higher frequencies results in higher ripple current, higher output voltage ripple, and lower efficiency at light load currents. Step 3b: Calculation of Switch Off-Time The switch Off-Time (time during which the switching MOSFET is not conducting) can be determined by: TOFF = − TON, The COFF capacitor value has to be selected in order to set the Off-Time, TOFF, above: COFF = , where 3980 is a characteristic factor of the CS51311; D = Duty Cycle. Step 4: Selection of the Output Inductor The inductor should be selected based on its inductance, current capability, and DC resistance. Increasing the induc- tor value will decrease output voltage ripple, but degrade transient response. There are many factors to consider in selecting the inductor including cost, efficiency, EMI and ease of manufacture. The inductor must be able to handle the peak current at the switching frequency without satu- rating, and the copper resistance in the winding should be kept as low as possible to minimize resistive power loss. There are a variety of materials and types of magnetic cores that could be used for this application. Among them are ferrites, molypermalloy cores (MPP), amorphous and powdered iron cores. Powdered iron cores are very com- monly used. Powdered iron cores are very suitable due to Period × (1 − D) 3980 1 FSW Duty Cycle FSW VOUT + (VHFET + VL + VDROOP) VIN + VLFET − VHFET − VL ∆I × ∆tTR COUT ESLMAX × ∆I ∆t ESLCAP Number of output capacitors ∆VESL × ∆t ∆I ESRCAP ESRMAX |
类似零件编号 - CS51311 |
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类似说明 - CS51311 |
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