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AD7091RBRMZ 数据表(PDF) 4 Page - Analog Devices |
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AD7091RBRMZ 数据表(HTML) 4 Page - Analog Devices |
4 / 20 page AD7091R Data Sheet Rev. 0 | Page 4 of 20 Parameter Test Conditions/Comments Min Typ Max Unit POWER REQUIREMENTS VDD 2.7 5.25 V VDRIVE 1.65 5.25 V IDD VIN = 0 V Normal Mode—Static5 VDD = 5.25 V 22 60 µA VDD = 3 V 21.6 33 µA Normal Mode—Operational VDD = 5.25 V, fSAMPLE = 1 MSPS 388 449 µA VDD = 3 V, fSAMPLE = 1 MSPS 349 408 µA VDD = 3 V, fSAMPLE = 100 kSPS 55 µA Power-Down Mode VDD = 5.25 V 0.334 4.4 µA VDD = 5.25 V, TA = −40°C to +85°C 0.334 1.4 µA VDD = 3 V 0.264 4.2 µA VDD = 3 V, TA = −40°C to +85°C 0.264 1.2 µA IDRIVE VIN = 0 V Normal Mode—Static6 VDRIVE = 5.25 V 32 500 nA VDRIVE = 3 V 28 500 nA Normal Mode—Operational VDRIVE = 5.25 V, fSAMPLE = 1 MSPS 42 86 µA VDRIVE = 3 V, fSAMPLE = 1 MSPS 17 20 µA Power-Down Mode VDRIVE = 5.25 V 7 41 nA VDRIVE = 3 V 2 28 nA Total Power Dissipation (PDD + PDRIVE) VIN = 0 V Normal Mode—Static5 VDD = VDRIVE = 5.25 V 116 318 µW VDD = VDRIVE = 3 V 65 101 µW Normal Mode—Operational VDD = VDRIVE = 5.25 V, fSAMPLE = 1 MSPS 2.3 2.9 mW VDD = VDRIVE = 3 V, fSAMPLE = 1 MSPS 1 1.3 mW Power-Down Mode VDD = VDRIVE = 5.25 V 1.8 24 µW VDD = VDRIVE = 3 V 0.8 13 µW 1 Dynamic performance is achieved with a burst SCLK. Operating a free running SCLK during acquisition phase degrades dynamic performance. 2 See the Terminology section. 3 For VDRIVE < VDD + 0.7 V. 4 Sample tested during initial release to ensure compliance. 5 SCLK is operating in burst mode and CS is idling high. With a free running SCLK and CS pulled low, the IDD static current is increased by 30 µA typical at VDD = 5.25 V. 6 SCLK is operating in burst mode and CS is idling high. With a free running SCLK and CS pulled low, the IDRIVE static current is increased by 32 µA typical at VDRIVE = 5.25 V. |
类似零件编号 - AD7091RBRMZ |
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类似说明 - AD7091RBRMZ |
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