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AD652JP-REEL7 数据表(PDF) 7 Page - Analog Devices |
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AD652JP-REEL7 数据表(HTML) 7 Page - Analog Devices |
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7 / 28 page  AD652 Rev. C | Page 7 of 28 COMPARATOR AND CK Q D G Q D Q D FLOP LATCH CLOCK IN ONE SHOT COS 5V CINT RIN INTEGRATOR HL 1mA –VS VIN tOS tOS INTEGRATOR OUTPUT THRESHOLD CLOCK COMPARATOR OUT AND OUT D FLOP OUT LATCH OUT FREQ OUT Figure 4. Block Diagram and System Waveforms Figure 4 shows that the period between output pulses is constrained to be an exact multiple of the clock period. Consider an input current of exactly one quarter the value of the reference current. In order to achieve a charge balance, the output frequency equals the clock frequency divided by four: one clock period for reset and three clock periods of integrate. This is shown in Figure 5. If the input current is increased by a very small amount, the output frequency should also increase by a very small amount. Initially, however, no output change is observed for a very small increase in the input current. The output frequency continues to run at one quarter of the clock, delivering an average of 250 µA to the summing junction. Since the input current is slightly larger than this, charge accumulates in the integrator and the sawtooth signal starts to drift down- ward. As the integrator sawtooth drifts down, the comparator threshold is crossed earlier and earlier in each successive cycle, until finally, a whole cycle is lost. When the cycle is lost, the integrate phase lasts for two periods of the clock instead of the usual three periods. Thus, among a long string of divide-by- fours, an occasional divide-by-three occurs; the average of the output frequency is very close to one quarter of the clock, but the instantaneous frequency can be very different. INTEGRATOR OUT CLOCK THRESHOLD Figure 5. Integrator Output for IIN = 250 µA Because of this, it is very difficult to observe the waveform on an oscilloscope. During all of this time, the signal at the output of the integrator is a sawtooth wave with an envelope that is also a sawtooth. See Figure 6. 200 µs/BOX 100 µs/BOX CINT FREQ OUT 10 µs/BOX CLOCK IN 10 µs/BOX Figure 6. Integrator Output for IIN Slightly Greater than 250 µs |
类似零件编号 - AD652JP-REEL7 |
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类似说明 - AD652JP-REEL7 |
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