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DAC4814BP 数据表(PDF) 7 Page - Burr-Brown (TI) |
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DAC4814BP 数据表(HTML) 7 Page - Burr-Brown (TI) |
7 / 12 page 7 ® DAC4814 TIMING CHARACTERISTICS VS = ±15V, VL = +5V, TA = –40°C to +85°C. PARAMETER MINIMUM t1—Data Setup Time 15ns t2—Data Hold Time 15ns t3—Chip Select to CLK, 15ns Latch, Data Setup Time t4—Chip Select to CLK, 40ns Latch, Data Hold Time t5—CLK Pulse Width 40ns t6—Clear Pulse Width 40ns t7—Latch Pulse Width 40ns t8—CLK Edge to LATCH A, 15ns LATCH B, LATCH C, or LATCH D t1 t3 t2 t8 t7 t4 t6 t5 CLK Data CS LATCH A LATCH D CLR 0V 5V 0V 5V 5V 5V NOTES: (1) All input signal rise and fall times are measured from 10% to 90% of +5V • t = t = 5ns. (2) Timing measurement reference level is V + V . R F IH IL 2 LATCH B LATCH C INTERFACE LOGIC TRUTH TABLE MODE CLR CLK CS LATCH A LATCH B LATCH C LATCH D FUNCTION X1 ↓ 0 X X X X Data clocked in X 1 X 1 X X X X No data transfer X 1 X 0 0 1 1 1 DAC A register updated X 1 X 0 1 0 1 1 DAC B register updated X 1 X 0 1 1 0 1 DAC C register updated X 1 X 0 1 1 1 0 DAC D register updated X 1 X 0 0 0 0 0 All DAC registers updated simultaneously 0 0 X X X X X X All registers cleared 1 0 X X X X X X Shift registers cleared = 000HEX, DAC registers = 800HEX Note: X = Don’t Care. ↓ = Falling edge triggered. |
类似零件编号 - DAC4814BP |
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类似说明 - DAC4814BP |
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