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DAC1221E 数据表(PDF) 6 Page - Burr-Brown (TI) |
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DAC1221E 数据表(HTML) 6 Page - Burr-Brown (TI) |
6 / 14 page 6 ® DAC1221 FIGURE 1. Capacitor Connections. THEORY OF OPERATION The DAC1221 is a precision, high dynamic range, self- calibrating, 16-bit, delta-sigma digital-to-analog converter. It contains a second-order delta-sigma modulator, a first- order switched-capacitor filter, a second-order continuous- time post filter, a microcontroller including the Instruction, Command and Calibration registers, a serial interface, and a clock generator circuit. The design topology provides low system noise and good power-supply rejection. The modulator frequency of the delta-sigma D/A converter is controlled by the system clock. The DAC1221 also includes complete onboard calibration that can correct for internal offset and gain errors. The calibration registers are fully readable and writable. This feature allows for system calibration. The various settings, modes, and registers of the DAC1221 are read or written via a synchronous serial interface. This interface operates as an externally clocked interface. DEFINITION OF TERMS Differential Nonlinearity Error—The differential nonlinearity error is the difference between an actual step width and the ideal value of 1 LSB. If the step width is exactly 1 LSB, the differential nonlinearity error is zero. A differential nonlinearity specification of less than 1 LSB guarantees monotonicity. Drift—The drift is the change in a parameter over tempera- ture. Full-Scale Range (FSR)—This is the magnitude of the typical analog output voltage range which is 2 • VREF. For example, when the converter is configured with a 1.25V reference, the full-scale range is 2.5V. Gain Error—This error represents the difference in the slope between the actual and ideal transfer functions. Linearity Error—The linearity error is the deviation of the actual transfer function from an ideal straight line between the data end points. Least Significant Bit (LSB) Weight—This is the ideal change in voltage that the analog output will change with a change in the digital input code of 1 LSB. Monotonicity—Monotonicity assures that the analog output will increase or stay the same for increasing digital input codes. Offset Error—The offset error is the difference between the expected and actual output, when the output is zero. The value is calculated from measurements made when VOUT = 20mV. Settling Time—The settling time is the time it takes the output to settle to its new value after the digital code has been changed. fXIN—The frequency of the crystal oscillator or CMOS- compatible input signal at the XIN input of the DAC1221. ANALOG OPERATION The system clock is divided down to provide the sample clock for the modulator. The sample clock is used by the modulator to convert the multi-bit digital input into a 1-bit digital output stream. The use of a 1-bit DAC provides inherent linearity. The digital output stream is then con- verted into an analog signal via the 1-bit DAC and then filtered by the 1st-order switched-capacitor filter. The output of the switched-capacitor filter feeds into the continuous time filter. The continuous time filter uses exter- nal capacitors, C1 and C2, to adjust the settling time. The connections for capacitors are shown in Figure 1. C1 con- nects to VREF. C2 connects between the C2 pins. C3 is connected between C3 and VREF, and is used for calibration. CALIBRATION The DAC1221 offers a self-calibration mode which auto- matically calibrates the output offset and gain. The calibra- tion is performed once and then normal operation is re- sumed. In general, calibration is recommended immediately after power-on and whenever there is a “significant” change in the operating environment. The amount of change which should cause re-calibration is dependent on the application. Where high accuracy is important, re-calibration should be done on changes in temperature and power supply. After a calibration has been accomplished, the Offset Cali- bration Register (OCR) and the Full-Scale Calibration Reg- ister (FCR) contain the results of the calibration. Note that the values in the calibration registers will vary from configuration to configuration and from part to part. V REF C 2A C 1 C 3 C 2B 12 11 10 9 7 8 DAC1221 C 3 6.8nF C 1 2.2nF C 2 150pF NOTE: C 1 and C2 should be NPO type capacitors. |
类似零件编号 - DAC1221E |
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类似说明 - DAC1221E |
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