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TS68882MF25 数据表(PDF) 11 Page - ATMEL Corporation |
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TS68882MF25 数据表(HTML) 11 Page - ATMEL Corporation |
11 / 43 page 11 TS68882 2119A–HIREL–04/02 Table 7. AC Electrical Characteristics – Read and Write Cycles (1) VCC =5.0 VDC ± 10%; GND = 0 VDC; Tc = -55°C/+125°CorTc = -40°C/+85°C (see Figure 7, Figure 8, Figure 9) N° Parameter 16.67 MHz 20 MHz 25 MHz 33.33 MHz Unit Min Max Min Max Min Max Min Max 6 Address valid to AS asserted (5) 15 10 5 5 ns 6a Address valid to DS asserted (read) (5) 15 10 5 5 ns 6b Address valid to DS asserted (write) (5) 50 50 35 26 ns 7AS negated to address invalid (6) 10 10 5 5 ns 7a DS negated to address invalid (6) 10 10 5 5 ns 8 CS asserted to AS asserted or AS asserted to CS asserted (9) 0 000 ns 8a CS asserted to DS asserted or DS asserted to CS asserted (read) (9) 0 000 ns 8b CS asserted to DS asserted or DS asserted to CS asserted (write) (9) 30 25 20 15 ns 9AS negated to CS negated 10 10 5 5 ns 9a DS negated to CS negated 10 10 5 5 ns 10 R/W high to AS asserted (read) 15 10 5 5 ns 10a R/W high to DS asserted (read) 15 10 5 5 ns 10b R/W low to DS asserted (write) 35302525 ns 11 AS negated to R/W low (read) or AS negated to R/W high (write) 10 10 5 5 ns 11a DS negated to R/W low (read) or DS negated to R/W high (write) 10 10 5 5 ns 12 DS width asserted (write) 40383023 ns 13 DS width negated 40 38 30 23 ns 13a DS negated to AS asserted (4) 30 30 25 18 ns 14 CS,DS asserted to data-out valid (read) (2) 80 45 45 30 ns 15 DS negated to data-out invalid (read) 0 0 0 0 ns 16 DS negated to data-out high impedance (read) 50 35 35 30 ns 17 Data-in invalid to DS asserted (write) 15 105 5ns 18 DS negated to data-in invalid (write) 15 10 5 5 ns 19 START true to DSACK0 and DSACK1 asserted (2) 50 35 25 20 ns 19a DSACK0 asserted to DSACK1 asserted (skew) (7) -15 15 -10 10 -10 10 5 ns 20 DSACK0 or DSACK1 asserted to data-out valid 50 43 32 17 ns 21 START false to DSACK0 and DSACK1 negated (8) 50 30 40 30 ns |
类似零件编号 - TS68882MF25 |
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类似说明 - TS68882MF25 |
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