74LVT125DB datasheet(9/16 Pages) NXP

部件名	74LVT125DB

功能描述	3.3 V quad buffer 3-state

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制造商	NXP [NXP Semiconductors]

网页	http://www.nxp.com

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9 / 16 page

74LVT_LVTH125_6

Product data sheet

Rev. 06 — 6 March 2006

9 of 16

Philips Semiconductors

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Test data is given in Table 9.

Deﬁnitions test circuit:

RL = Load resistor.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = Test voltage for switching times.

Fig 8.

Load circuitry for switching times

Table 9.

Test data

Input

Load

VEXT

VI

fi

tW

tr, tf

CL

RL

tPHZ, tPZH tPLZ, tPZL tPLH, tPHL

2.7 V

≤ 10 MHz 500 ns

≤ 2.5 ns

50 pF

500

Ω

GND

6 V

open

VEXT

VCC

VI

VO

001aae235

DUT

CL

RT

RL

PULSE

GENERATOR

VM

tW

10 %

90 %

0 V

VI

negative

pulse

positive

pulse

0 V

VM

90 %

10 %

tf

tr

tf

类似零件编号 - 74LVT125DB

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