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74VHCT595BQ 数据表(PDF) 11 Page - NXP Semiconductors |
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74VHCT595BQ 数据表(HTML) 11 Page - NXP Semiconductors |
11 / 22 page 74VHC_VHCT595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 July 2012 11 of 22 NXP Semiconductors 74VHC595; 74VHCT595 8-bit serial-in/serial-out or parallel-out shift register with output latches [1] Typical values are measured at nominal supply voltage. [2] tpd is the same as tPHL and tPLH. [3] tpd is the same as tPHL only. [4] ten is the same as tPZL and tPZH. [5] tdis is the same as tPLZ and tPHZ. [6] CPD is used to determine the dynamic power dissipation (PD in W). PD =CPD VCC2 fi + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; (C L VCC 2 f o) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in V. [7] All 9 outputs switching. ten enable time OE to Qn; see Figure 12 [4] CL = 15 pF - 4.8 9.0 1.0 11.0 1.0 12.0 ns CL = 50 pF - 6.2 11.6 1.0 13.0 1.0 14.5 ns tdis disable time OE to Qn; see Figure 12 [5] CL = 15 pF - 3.6 6.9 1.0 8.0 1.0 9.0 ns CL = 50 pF - 5.8 10.3 1.0 11.0 1.0 12.0 ns fmax maximum frequency SHCP and STCP; see Figure 8 and 9 130 170 - 110 - 90 - MHz tW pulse width SHCP HIGH or LOW; see Figure 8 5.0 - - 5.0 - 5.0 - ns STCP HIGH or LOW; see Figure 9 5.0 - - 5.0 - 5.0 - ns MR LOW; see Figure 11 5.0 - - 5.0 - 5.0 - ns tsu set-up time DS to SHCP; see Figure 9 3.0 - - 3.0 - 3.0 - ns SHCP to STCP; see Figure 10 5.0 - - 5.0 - 5.0 - ns th hold time DS to SHCP; see Figure 10 2.0 - - 2.0 - 2.0 - ns trec recovery time MR to SHCP; see Figure 11 3.0 - - 3.0 - 3.0 - ns CPD power dissipation capacitance fi = 1 MHz; VI =GND to VCC [6] [7] -190 - - - - - pF Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max Min Max |
类似零件编号 - 74VHCT595BQ |
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类似说明 - 74VHCT595BQ |
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