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AM79C32AVC 数据表(PDF) 6 Page - Advanced Micro Devices |
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AM79C32AVC 数据表(HTML) 6 Page - Advanced Micro Devices |
6 / 101 page 6 Am79C30A/32A Data Sheet PIN DESCRIPTION* Line Interface Unit (LIU) HSW Hook-Switch (Input) The HSW signal indicates if the hook-switch is on or off hook. This signal may be generated with a mechanical switch wired to ground with a pull-up resistor to VCC. Any change in the HSW state causes an interrupt. LIN1, LIN2 Subscriber Line Input (Differential Inputs) The LIN1 and LIN2 inputs interface to the subscriber (S reference point) via an isolation transformer. LIN2 is the positive input; LIN1 is the negative input. These pins are not TTL compatible. LOUT1, LOUT2 Subscriber Line Output (Differential Outputs) The LOUT1 and LOUT2 line driver output signals inter- face to the subscriber line at the S reference point via an isolation transformer and resistors. LOUT2 is the positive S-interface driver (sources current during a High mark), and LOUT1 is the negative S-interface dr i ver ( sou rce s cur ren t d ur i ng Low m a r k). Fo r multi-point applications, all TEs must maintain the same polarity on the S Interface. These pins are not TTL compatible. Main Audio Processor (MAP) All MAP pins are analog, and therefore are not TTL compatible. AINA, AINB Analog (Inputs) These analog inputs allow for two separate analog (au- dio) inputs to the transmit path of the codec/filter.Input signals on either of these pins must be referenced to AREF. AREF Analog Reference (Output) This is a nominal 2.25-V reference voltage output for bi- asing the analog inputs. When the MAP is disabled, this pin is high impedance. CAP1, CAP2 Capacitor/Resistor (CAP1, Input; CAP2, Output) An external resistor and capacitor are connected in se- ries between these pins. These components are needed for the integrator in the Analog-to-Digital Con- verter (ADC). EAR1, EAR2 Earpiece Interface (Differential Outputs) EAR1 and EAR2 are the outputs from the receive path of the codec/filter. These differential outputs can di- rectly drive a minimum load of 130 ohms. LS1, LS2 Loudspeaker Interface (Differential Outputs) LS1 and LS2 are push-pull outputs which can directly drive a minimum load of 40 ohms. Microprocessor Interface (MPI) A2–A0 Address Line (Inputs) A2, A1, and A0 signals select source and destination registers for read and write operations on the data bus. CS Chip Select (Input) CS must be Low to read or write to the Am79C30A/ 32A. Data transfer occurs over the bidirectional data lines (D7–D0). D7–D0 Data Bus (Bidirectional with High-Impedance State) The eight bidirectional data bus lines are used to ex- change information with the microprocessor. D0 is the least significant bit (LSB) and D7 is the most significant bit (MSB). A High on the data bus line corresponds to a logic 1, and Low corresponds to a logic 0. These lines act as inputs when both WR and CS are active and as outputs when both RD and CS are active. When CS is inactive or both RD and WR are inactive, the D7–D0 pins are in a high-impedance state. INT Interrupt (Output) An active Low output on the INT pin informs the exter- nal microprocessor that the Am79C30A/32A needs in- terrupt service. INT is updated once every 125 µs. The INT pin remains active until the Interrupt Register (IR) is read or the Am79C30A/32A is reset. RESET Reset (Input) Reset is an active High signal which causes the Am79C30A/32A to immediately terminate its present activity and initialize to the reset condition. When reset returns Low, the Am79C30A/32A enters the Idle mode. The MCLK output remains active while RESET is held High. Note: * All signal levels are TTL compatible unless otherwise stated. |
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类似说明 - AM79C32AVC |
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