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Si5376-EVB 数据表(PDF) 9 Page - Silicon Laboratories |
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Si5376-EVB 数据表(HTML) 9 Page - Silicon Laboratories |
9 / 66 page Si5376 Rev. 1.0 9 Output Duty Cycle Uncertainty @ 622.08 MHz CKODC 100 Load Line-to-Line Measured at 50% Point (differential) —— ±40 ps LVCMOS Input Pins Minimum Reset Pulse Width tRSTMN 1— — µs Reset to Microproces- sor Access Ready tREADY —— 10 ms LVCMOS Output Pins Rise/Fall Times tRF CLOAD = 20pf See Figure 2 —25 — ns LOSn Trigger Window LOSTRIG From last CKINn to Internal detection of LOSn N3 ≠ 1 — — 4.5 x N3 TCKIN Time to Clear LOL after LOS Cleared tCLRLOL LOS to LOL Fold = Fnew Stable OSC_P, OSC_N reference —10 — ms Table 3. AC Characteristics (Continued) (VDD = 1.8 ± 5%, 2.5 ±10%, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. A crystal may not be used in place of an oscillator. 2. Input to output skew after an ICAL is not controlled and can be any value. |
类似零件编号 - Si5376-EVB |
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类似说明 - Si5376-EVB |
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