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CDCLVD1204RGTT 数据表(PDF) 10 Page - Texas Instruments

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部件名 CDCLVD1204RGTT
功能描述  2:4 Low Additive Jitter LVDS Buffer
Download  20 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

CDCLVD1204RGTT 数据表(HTML) 10 Page - Texas Instruments

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FerriteBead
1 µF
10 µF
0.1 µF
Board
Supply
Chip
Supply
CDCLVD1204
SCAS898A – MAY 2010 – REVISED JUNE 2010
www.ti.com
APPLICATION INFORMATION
THERMAL MANAGEMENT
For reliability and performance reasons, the die temperature should be limited to a maximum of 125°C.
The device package has an exposed pad that provides the primary heat removal path to the printed circuit board
(PCB). To maximize the heat dissipation from the package, a thermal landing pattern including multiple vias to a
ground plane must be incorporated into the PCB within the footprint of the package. The Thermal Pad must be
soldered down to ensure adequate heat conduction to of the package. Figure 12 shows a recommended land
and via pattern.
Figure 12. Recommended PCB Layout
POWER-SUPPLY FILTERING
High-performance clock buffers are sensitive to noise on the power supply, which can dramatically increase the
additive jitter of the buffer. Thus, it is essential to reduce noise from the system power supply, especially when
jitter/phase noise is critical to applications.
Filter capacitors are used to eliminate the low-frequency noise from the power supply, where the bypass
capacitors provide the low impedance path for high-frequency noise and guard the power-supply system against
the induced fluctuations. These bypass capacitors also provide instantaneous current surges as required by the
device and should have low equivalent series resistance (ESR). To properly use the bypass capacitors, they
must be placed close to the power-supply pins and laid out with short loops to minimize inductance. It is
recommended to add as many high-frequency (for example, 0.1 mF) bypass capacitors as there are supply pins
in the package. It is recommended, but not required, to insert a ferrite bead between the board power supply and
the chip power supply that isolates the high-frequency switching noises generated by the clock driver; these
beads prevent the switching noise from leaking into the board supply. Choose an appropriate ferrite bead with
low dc resistance because it is imperative to provide adequate isolation between the board supply and the chip
supply, as well as to maintain a voltage at the supply pins that is greater than the minimum voltage required for
proper operation.
Figure 13. Power-Supply Decoupling
10
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): CDCLVD1204


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