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AD73360AR 数据表(PDF) 3 Page - Analog Devices

部件名 AD73360AR
功能描述  Six-Input Channel Analog Front End
Download  35 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD73360AR 数据表(HTML) 3 Page - Analog Devices

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REV. A
–3–
AD73360
AD73360A
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
LOGIC INPUTS
VINH, Input High Voltage
VDD – 0.8
VDD
V
VINL, Input Low Voltage
0
0.8
V
IIH, Input Current
10
µA
CIN, Input Capacitance
10
pF
LOGIC OUTPUTS
VOH, Output High Voltage
VDD – 0.4
VDD
V
|IOUT|
≤ 100 µA
VOL, Output Low Voltage
0
0.4
V
|IOUT|
≤ 100 µA
Three-State Leakage Current
–10
+10
µA
POWER SUPPLIES
AVDD1, AVDD2
2.7
3.3
V
DVDD
2.7
3.3
V
IDD
8
See Table I
NOTES
1Operating temperature range is as follows: –40
°C to +85°C. Therefore, T
MIN = –40
°C and T
MAX = +85
°C.
2Test conditions: Input PGA set for 0 dB gain (unless otherwise noted).
3At input to sigma-delta modulator of ADC.
4Guaranteed by design.
5Overall group delay will be affected by the sample rate and the external digital filtering.
6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (4
× 1011)/DMCLK.
7Frequency response of ADC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier
bypassed and input gain of 0 dB.
8Test Conditions: no load on digital inputs, analog inputs ac coupled to ground.
Specifications subject to change without notice.
Table I. Current Summary (AVDD = DVDD = 3.3 V)
Total
Analog
Digital
Current
MCLK
Conditions
Current
Current
(Max)
SE
ON
Comments
ADCs Only On
12
10
26.5
1
YES
REFOUT Disabled
REFCAP Only On
0.75
0.04
1.0
0
NO
REFOUT Disabled
REFCAP and
REFOUT Only On
3.3
0.04
4.5
0
NO
All Sections Off
0.01
1.2
1.5
0
YES
MCLK Active Levels Equal to 0 V and DVDD
All Sections Off
0.01
0.03
0.1
0
NO
Digital Inputs Static and Equal to 0 V or DVDD
The above values are in mA and are typical values unless otherwise noted. MCLK = 16.384 MHz; SCLK = 16.384 MHz.


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