数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD7671AST 数据表(PDF) 7 Page - Analog Devices

部件名 AD7671AST
功能描述  16-Bit, 1 MSPS CMOS ADC
Download  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7671AST 数据表(HTML) 7 Page - Analog Devices

Back Button AD7671AST Datasheet HTML 3Page - Analog Devices AD7671AST Datasheet HTML 4Page - Analog Devices AD7671AST Datasheet HTML 5Page - Analog Devices AD7671AST Datasheet HTML 6Page - Analog Devices AD7671AST Datasheet HTML 7Page - Analog Devices AD7671AST Datasheet HTML 8Page - Analog Devices AD7671AST Datasheet HTML 9Page - Analog Devices AD7671AST Datasheet HTML 10Page - Analog Devices AD7671AST Datasheet HTML 11Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 24 page
background image
REV. B
–7–
AD7671
PIN FUNCTION DESCRIPTION (continued)
Pin
No.
Mnemonic
Type
Description
21
D[8]
DO
When SER/
PAR is LOW, this output is used as Bit 8 of the Parallel Port Data Output Bus.
or SDOUT
When SER/
PAR is HIGH, this output, part of the Serial Port, is used as a serial data output
synchronized to SCLK. Conversion results are stored in an on-chip register. The AD7671 provides
the conversion result, MSB first, from its internal shift register. The data format is determined
by the logic level of OB/
2C. In Serial Mode, when EXT/INT is LOW, SDOUT is valid on both
edges of SCLK.
In Serial Mode, when EXT/
INT is HIGH:
If INVSCLK is LOW, SDOUT is updated on SCLK rising edge and valid on the next falling edge.
If INVSCLK is HIGH, SDOUT is updated on SCLK falling edge and valid on the next rising edge.
22
D[9]
DI/O
When SER/
PAR is LOW, this output is used as Bit 9 of the Parallel Port Data Output Bus.
or SCLK
When SER/
PAR is HIGH, this pin, part of the Serial Port, is used as a serial data clock input or
output, dependent upon the logic state of the EXT/
INT pin. The active edge where the data SDOUT
is updated depends upon the logic state of the INVSCLK pin.
23
D[10]
DO
When SER/
PAR is LOW, this output is used as Bit 10 of the Parallel Port Data Output Bus.
or SYNC
When SER
/PAR is HIGH, this output, part of the Serial Port, is used as a digital output frame
synchronization for use with the internal data clock (EXT/
INT = Logic LOW). When a read sequence
is initiated and INVSYNC is LOW, SYNC is driven HIGH and remains HIGH while SDOUT
output is valid. When a read sequence is initiated and INVSYNC is HIGH, SYNC is driven LOW
and remains LOW while SDOUT output is valid.
24
D[11]
DO
When SER/
PAR is LOW, this output is used as Bit 11 of the Parallel Port Data Output Bus.
or RDERROR
When SER/
PAR is HIGH and EXT/INT is HIGH, this output, part of the Serial Port, is used as an
incomplete read error flag. In Slave Mode, when a data read is started and not complete when the
following conversion is complete, the current data is lost and RDERROR is pulsed HIGH.
25–28
D[12:15]
DO
Bit 12 to Bit 15 of the Parallel Port Data Output Bus. When SER/
PAR is HIGH, these outputs are in
high impedance.
29
BUSY
DO
Busy Output. Transitions HIGH when a conversion is started and remains HIGH until the conversion
is complete and the data is latched into the on-chip shift register. The falling edge of BUSY could
be used as a data-ready clock signal.
30
DGND
P
Must Be Tied to Digital Ground.
31
RD
DI
Read Data. When
CS and RD are both LOW, the Interface Parallel or Serial Output Bus is enabled.
32
CS
DI
Chip Select. When
CS and RD are both LOW, the Interface Parallel or Serial Output Bus is enabled.
CS is also used to gate the external serial clock.
33
RESET
DI
Reset Input. When set to a logic HIGH, reset the AD7671. Current conversion, if any, is aborted.
If not used, this pin could be tied to DGND.
34
PD
DI
Power-Down Input. When set to a logic HIGH, power consumption is reduced and conversions are
inhibited after the current one is completed.
35
CNVST
DI
Start Conversion. A falling edge on
CNVST puts the internal sample-and-hold into the hold state
and initiates a conversion. In Impulse Mode (IMPULSE HIGH and WARP LOW), if
CNVST is
held LOW when the acquisition phase
(t
8) is complete, the internal sample-and-hold is put into the
hold state and a conversion is immediately started.
36
AGND
P
Must Be Tied to Analog Ground.
37
REF
AI
Reference Input Voltage.
38
REFGND
AI
Reference Input Analog Ground.
39
INGND
P
Analog Input Ground.
40, 41,
INA, INB,
AI
Analog Inputs. Refer to Table I for input range configuration.
42, 43
INC, IND
NOTES
AI = Analog Input
DI = Digital Input
DI/O = Bidirectional Digital
DO = Digital Output
P = Power


类似零件编号 - AD7671AST

制造商部件名数据表功能描述
logo
Analog Devices
AD7671ASTZ AD-AD7671ASTZ Datasheet
675Kb / 24P
   16-Bit, 1 MSPS CMOS ADC
REV. C
AD7671ASTZ AD-AD7671ASTZ Datasheet
590Kb / 25P
   16-Bit, 1 MSPS CMOS ADC
AD7671ASTZRL AD-AD7671ASTZRL Datasheet
590Kb / 25P
   16-Bit, 1 MSPS CMOS ADC
More results

类似说明 - AD7671AST

制造商部件名数据表功能描述
logo
Analog Devices
AD7671ASTZ AD-AD7671ASTZ Datasheet
675Kb / 24P
   16-Bit, 1 MSPS CMOS ADC
REV. C
AD7671 AD-AD7671_15 Datasheet
675Kb / 24P
   16-Bit, 1 MSPS CMOS ADC
REV. C
AD7671 AD-AD7671 Datasheet
590Kb / 25P
   16-Bit, 1 MSPS CMOS ADC
AD7490 AD-AD7490_17 Datasheet
748Kb / 29P
   16-Channel, 1 MSPS, 12-Bit ADC
AD7723BSZ AD-AD7723BSZ Datasheet
751Kb / 32P
   16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC
REV. C
AD7723 AD-AD7723 Datasheet
435Kb / 23P
   16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC
REV. 0
AD7723 AD-AD7723_15 Datasheet
751Kb / 32P
   16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC
REV. C
AD7723 AD-AD7723_17 Datasheet
548Kb / 33P
   16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC
AD7677 AD-AD7677_17 Datasheet
380Kb / 21P
   16-Bit, 1 LSB INL, 1 MSPS Differential ADC
AD7677 AD-AD7677 Datasheet
322Kb / 20P
   16-Bit, 1 LSB INL, 1 MSPS Differential ADC
REV. 0
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com