SI5330H-A00221-GM datasheet(8/20 Pages) SILABS

部件名	SI5330H-A00221-GM

功能描述	Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs

Download	20 Pages

Scroll/Zoom	100%

制造商	SILABS [Silicon Laboratories]

网页	http://www.silabs.com

标志

8 / 20 page

Si5330

8

Rev. 1.0

Table 9. Absolute Maximum Ratings1,2,3,4,5

Parameter

Symbol

Test Condition

Value

Unit

DC Supply Voltage

VDD

–0.5 to 3.8

V

Storage Temperature Range

TSTG

–55 to 150

°C

ESD Tolerance

HBM

(100 pF, 1.5 k

)

2.5

kV

ESD Tolerance

CDM

550

V

ESD Tolerance

MM

175

V

Latch-up Tolerance

JESD78 Compliant

Junction Temperature

TJ

150

°C

Soldering Temperature

(Pb-free profile)5

TPEAK

260

°C

Soldering Temperature Time at TPEAK

(Pb-free profile)5

TP

20–40

sec

Notes:

1. Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation should be

restricted to the conditions as specified in the operational sections of this data sheet. Exposure to maximum rating

conditions for extended periods may affect device reliability.

2. 24-QFN package is RoHS compliant.

3. For more packaging information, go to www.silabs.com/support/quality/pages/RoHSInformation.aspx.

4. Moisture sensitivity level is MSL3.

5. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.

类似零件编号 - SI5330H-A00221-GM

制造商	部件名	数据表	功能描述
Silicon Laboratories	SI5330H-A00221-GM	158Kb / 20P	1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
Silicon Laboratories	Si5330H-A00221-GM	41Kb / 1P	The Si5330 Clock Buffer datasheet v1.0 is now available

More results

类似说明 - SI5330H-A00221-GM

制造商	部件名	数据表	功能描述
Maxim Integrated Produc...	MAX9830AEVKIT	905Kb / 4P	Differential or Single-Ended Input Rev 0; 8/09
Texas Instruments	DEM-ADS807E	328Kb / 9P	[Old version datasheet] SINGLE-ENDED OR DIFFERENTIAL INPUT CONFIGURATION
Maxim Integrated Produc...	MAX1181EVKIT	497Kb / 9P	Single-Ended or Fully Differential Signal Input Configuration Rev 2; 7/02
	MAX1211EVKIT	544Kb / 13P	Fully Differential or Single-Ended Signal Input Configuration Rev 1; 6/05
	MAX1448EVKIT	342Kb / 6P	Single-Ended or Fully Differential Signal Input Configuration Rev 2; 11/03
Integrated Device Techn...	ICS849S625I	639Kb / 24P	Ten selectable differential LVPECL or LVDS outputs
Integrated Device Techn...	ICS859S0424I	909Kb / 24P	Four programmable differential LVPECL or LVDS output pairs
Analog Devices	AD7266BSUZ-REEL	644Kb / 28P	Differential/Single-Ended Input, Dual REV. B
Integrated Device Techn...	ICS8S89833I	722Kb / 16P	Four differential LVDS outputs
Unisonic Technologies	PA3138G-P14-R	166Kb / 6P	Differential Input and Single-Ended Output