74AUP1G34-Q100 datasheet(8/14 Pages) NXP

部件名	74AUP1G34-Q100

功能描述	Low-power buffer

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制造商	NXP [NXP Semiconductors]

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74AUP1G34_Q100

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Product data sheet

Rev. 1 — 26 March 2013

8 of 14

NXP Semiconductors

74AUP1G34-Q100

Low-power buffer

[1]

All typical values are measured at nominal VCC.

[2]

tpd is the same as tPLH and tPHL.

[3]

CPD is used to determine the dynamic power dissipation (PD in W).

PD =CPD  VCC2  fi  N+ (CL  VCC2  fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

(C

L  VCC

2

 f

o) = sum of outputs.

12. Waveforms

CPD

power

dissipation

capacitance

fi = 1 MHz;

VI =GND to VCC

[3]

VCC = 0.8 V

-

2.5

-

pF

VCC = 1.1 V to 1.3 V

-

2.6

-

pF

VCC = 1.4 V to 1.6 V

-

2.7

-

pF

VCC = 1.65 V to 1.95 V

-

2.9

-

pF

VCC = 2.3 V to 2.7 V

-

3.4

-

pF

VCC = 3.0 V to 3.6 V

-

4.0

-

pF

Table 8.

Dynamic characteristics …continued

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.

Symbol Parameter

Conditions

Tamb = 25 C

Tamb = 40 C to +125 C

Unit

Min

Typ[1] Max

Min

Max

(85

C)

Min

Max

(125

C)

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 5.

The data input (A) to output (Y) propagation delays

mnb153

tPHL

tPLH

VM

A input

Y output

GND

VI

VOH

VOL

Table 9.

Measurement points

Supply voltage

Output

Input

VCC

VM

VI

tr = tf

0.8 V to 3.6 V

0.5

 V

CC

0.5

 V

CC

VCC

 3.0 ns

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