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ML4802IP 数据表(PDF) 2 Page - Fairchild Semiconductor |
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ML4802IP 数据表(HTML) 2 Page - Fairchild Semiconductor |
2 / 15 page ML4802 2 REV. 1.0.1 12/12/2000 PIN CONFIGURATION PIN DESCRIPTION PIN NAME FUNCTION 9 RAMP 2 PWM current feedback/overcurrent limit input 10 GND Ground 11 PWM OUT PWM driver output 12 PFC OUT PFC driver output 13 VCC Positive supply input 14 VREF Buffered output for the internal 7.5V reference 15 VFB PFC voltage error amplifier input 16 VEAO PFC voltage error amplifier output PIN NAME FUNCTION 1 IEAO PFC current error amplifier output 2 IAC PFC gain control reference input 3 ISENSE Current sense input to the PFC current limit comparator 4 VRMS Input for PFC RMS line voltage compensation 5 SS Connection point for the PWM soft start capacitor 6 VDC PWM feedback voltage input 7 RT/CT Connection for master (PWM) oscillator frequency setting components 8 RAMP 1 PFC ramp input 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 IEAO IAC ISENSE VRMS SS VDC RT/CT RAMP 1 VEAO VFB VREF VCC PFC OUT PWM OUT GND RAMP 2 TOP VIEW ML4802 16-Pin PDIP (P16) 16-Pin Narrow SOIC (S16N) |
类似零件编号 - ML4802IP |
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类似说明 - ML4802IP |
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