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BU45L314 数据表(PDF) 9 Page - Rohm |
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BU45L314 数据表(HTML) 9 Page - Rohm |
9 / 17 page www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ02201-0R7R0G300130-1-2 TSZ22111 ・ 15 ・ 001 9/14 17.May.2013 Rev.003 BU45Kxxxx, BU46Kxxxx, BU45Lxxxx, BU46Lxxxx series Datasheet ● Application Information Explanation of Operation For both the open drain type (Fig.13) and the CMOS output type (Fig.14), the detection and release voltages are used as threshold voltages. When the voltage applied to the VDD pins reaches the applicable threshold voltage, the VOUT terminal voltage switches from either “High” to “Low” or from “Low” to “High”. Because the BU45xxxxx series uses an open drain output type, it is necessary to connect a pull-up resistor to VDD or another power supply if needed [The output “High” voltage (VOUT) in this case becomes VDD or the voltage of the other power supply]. Fig.13 (BU45xxxxx Type Internal Block Diagram) Fig.14 (BU46xxxxx Type Internal Block Diagram) Reference Data Examples of Leading (tPLH) and Falling (tPHL) Output Part Number tPLH[ms] tPHL[µs] BU45K232G 208 1.4 BU46K232G 208 1.4 VDD=1.8V 2.8V VDD=2.8V 1.8V *This data is for reference only. The figures will vary with the application, so please confirm actual operating conditions before use. Timing Waveform Example: The following shows the relationship between the input voltages VDD and the output voltage VOUT when the input power supply voltage VDD is made to sweep up and sweep down (the circuits are those in Fig. 13 and 14). 1 When the power supply is turned on, the output is unstable from after over the operating limit voltage (VOPL) until tPHL. Therefore it is possible that the reset signal is not outputted when the rise time of VDD is faster than tPHL. 2 When VDD is greater than VOPL but less than the reset release voltage (VDET + ∆VDET), the output voltages will switch to Low. 3 If VDD exceeds the reset release voltage (VDET + ∆VDET), the counter timer start and VOUT switches from L to H. 4 If VDD drops below the detection voltage (VDET) when the power supply is powered down or when there is a power supply fluctuation, VOUT switches to L (with a delay of tPHL). 5 The potential difference between the detection voltage and the release voltage is known as the hysteresis width ( ∆VDET). The system is designed such that the output does not toggle with power supply fluctuations within this hysteresis width, thus, preventing malfunctions due to noise. Timing may change depending on application and use. Please verify and confirm using practical applications. Fig.15 Timing Waveform VDD VDET+ Δ VDET VDET VOPL 0V tPHL ① ② VOUT tPLH tPHL tPLH ③ VOL VOH VDD ④ ⑤ Vref R1 R2 R3 VDD GND Oscillator Circuit Counter Timer Q1 VOUT VDD Reset GND Reset Q2 Q1 Vref R1 R2 R3 VDD Oscillator Circuit Counter Timer VOUT |
类似零件编号 - BU45L314 |
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类似说明 - BU45L314 |
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