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AD5781ARUZ-REEL7 数据表(PDF) 2 Page - Analog Devices

部件名 AD5781ARUZ-REEL7
功能描述  True 18-Bit, Voltage Output DAC 짹0.5 LSB INL, 짹0.5 LSB DNL
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD5781ARUZ-REEL7 数据表(HTML) 2 Page - Analog Devices

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AD5781
Data Sheet
Rev. D | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 5
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Description .............................. 8
Typical Performance Characteristics ............................................. 9
Terminology .................................................................................... 17
Theory of Operation ...................................................................... 19
DAC Architecture....................................................................... 19
Hardware Control Pins.............................................................. 20
On-Chip Registers...................................................................... 21
AD5781 Features ............................................................................ 24
Power-On to 0 V......................................................................... 24
Configuring the AD5781 .......................................................... 24
DAC Output State ...................................................................... 24
Linearity Compensation............................................................ 24
Output Amplifier Configuration.............................................. 24
Applications Information .............................................................. 26
Typical Operating Circuit ......................................................... 26
Evaluation Board ........................................................................ 26
Outline Dimensions....................................................................... 27
Ordering Guide .......................................................................... 27
REVISION HISTORY
7/13—Rev. C to Rev. D
Changes to t1 Test Conditions/Comments and Endnote 2 ......... 5
Deleted Figure 4................................................................................ 7
Deleted Daisy-Chain Operation Section..................................... 20
11/11—Rev. B to Rev. C
Added Figure 48; Renumbered Sequentially .............................. 17
Change to Ideal Transfer Function Equation.............................. 22
9/11—Rev. A to Rev. B
Added Patent Note ........................................................................... 1
Changes to Table 3............................................................................ 3
Changes to OPGND Description, Table 12 ................................ 23
8/11—Rev. 0 to Rev. A
Change to Features Section..............................................................1
Changes to Specifications Section...................................................3
Deleted t14 Parameter from Timing Specifications Section,
Table 4 .................................................................................................5
Changes to Figure 2 and Figure 3....................................................6
Changes to Figure 4...........................................................................7
Replaced Figure 42 and Figure 43 ................................................ 16
Added New Figure 44, Figure 45, and Figure 46, Renumbered
Sequentially ..................................................................................... 16
7/10—Revision 0: Initial Version


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