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HCPL-788J-000E 数据表(PDF) 8 Page - AVAGO TECHNOLOGIES LIMITED |
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HCPL-788J-000E 数据表(HTML) 8 Page - AVAGO TECHNOLOGIES LIMITED |
8 / 20 page 8 AC Electrical Specifications Unless otherwise noted, all typicals and figures are at the nominal operating conditions of V IN+ = 0, V IN- = 0 V, V REF = 4.0 V, V DD1 = V DD2 = 5 V and T A = 25°C; all Minimum/Maximum specifications are within the Recommended Operating Conditions. Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note V OUT Bandwidth (-3dB) BW 20 30 kHz V IN+ = 200 mV pk-pk sine wave. 12, 20 V OUT Noise N OUT 2.2 4 mVrms V IN+ = 0 V 20 12 V IN to V OUT Signal Delay (50 - 50%) t DSIG 920 μs V IN+ = 50 mV to 200 mV step. 14, 20 13 V OUT Rise/Fall Time (10–90) t RFSIG 10 25 μs V IN+ = 50 mV to 200 mV step. 14, 20 ABSVAL Signal Delay t DABS 920 μs V IN+ = 50 mV to 200 mV step. 14, 20 ABSVAL Rise/Fall Time (10–90%) t RFABS 10 25 μs V IN+ = 50 mV to 200 mV step. 14, 20 FAULT Detection Delay t FHL 3 6 μs V IN+ = 0 mV to ±500 mV step. 15, 20 14 FAULT Release Delay t FLH 10 20 μs V IN+ = ±500 mV to 0 mV step. 16, 20 15 Transient Fault Rejection t REJECT 1 2 μs V IN+ = 0 mV to ±500 mV pulse. 17, 20 16 Common Mode Transient Immunity CMTI 10 25 kV/μs For V OUT , FAULT, and ABSVAL outputs. 17 Common-Mode Rejection Ratio at 60 Hz CMRR >140 dB 18 |
类似零件编号 - HCPL-788J-000E |
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类似说明 - HCPL-788J-000E |
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