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SI-50170 数据表(PDF) 11 Page - Micrel Semiconductor |
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SI-50170 数据表(HTML) 11 Page - Micrel Semiconductor |
11 / 54 page Micrel, Inc. KSZ8041NL/RNL September 2010 11 M9999-090910-1.4 Pin Description – KSZ8041NL (Continued) Pin Number Pin Name Type (1) Pin Function 20 RXER / RX_ER / ISO Ipd/O MII Mode: Receive Error Output / RMII Mode: Receive Error Output / Config Mode: The pull-up/pull-down value is latched as ISOLATE during power-up / reset. See “Strapping Options” section for details. 21 INTRP Opu Interrupt Output: Programmable Interrupt Output Register 1Bh is the Interrupt Control/Status Register for programming the interrupt conditions and reading the interrupt status. Register 1Fh bit 9 sets the interrupt output to active low (default) or active high. 22 TXC O MII Mode: Transmit Clock Output 23 TXEN / TX_EN I MII Mode: Transmit Enable Input / RMII Mode: Transmit Enable Input 24 TXD0 / TXD[0] I MII Mode: Transmit Data Input[0] (4) / RMII Mode: Transmit Data Input[0] (5) 25 TXD1 / TXD[1] I MII Mode: Transmit Data Input[1] (4) / RMII Mode: Transmit Data Input[1] (5) 26 TXD2 I MII Mode: Transmit Data Input[2] (4) / 27 TXD3 I MII Mode: Transmit Data Input[3] (4) / 28 COL / CONFIG0 Ipd/O MII Mode: Collision Detect Output / Config Mode: The pull-up/pull-down value is latched as CONFIG0 during power-up / reset. See “Strapping Options” section for details. 29 CRS / CONFIG1 Ipd/O MII Mode: Carrier Sense Output / Config Mode: The pull-up/pull-down value is latched as CONFIG1 during power-up / reset. See “Strapping Options” section for details. |
类似说明 - SI-50170 |
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