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74LVC1G74GN.125 数据表(PDF) 9 Page - NXP Semiconductors

部件名 74LVC1G74GN.125
功能描述  Single D-type flip-flop with set and reset; positive edge trigger
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

74LVC1G74GN.125 数据表(HTML) 9 Page - NXP Semiconductors

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74LVC1G74
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 12 — 2 April 2013
9 of 25
NXP Semiconductors
74LVC1G74
Single D-type flip-flop with set and reset; positive edge trigger
11. Dynamic characteristics
Table 9.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
tpd
propagation delay
CP to Q, Q; see Figure 8
[2]
VCC = 1.65 V to 1.95 V
1.5
6.0
13.4
1.5
13.4
ns
VCC = 2.3 V to 2.7 V
1.0
3.5
7.1
1.0
7.1
ns
VCC = 2.7 V
1.0
3.5
7.1
1.0
7.1
ns
VCC = 3.0 V to 3.6 V
1.0
3.5
5.9
1.0
5.9
ns
VCC = 4.5 V to 5.5 V
1.0
2.5
4.1
1.0
4.1
ns
SD to Q, Q; see Figure 9
[2]
VCC = 1.65 V to 1.95 V
1.5
6.0
12.9
1.5
12.9
ns
VCC = 2.3 V to 2.7 V
1.0
3.5
7.0
1.0
7.0
ns
VCC = 2.7 V
1.0
3.5
7.0
1.0
7.0
ns
VCC = 3.0 V to 3.6 V
1.0
3.0
5.9
1.0
5.9
ns
VCC = 4.5 V to 5.5 V
1.0
2.5
4.1
1.0
4.1
ns
RD to Q, Q; see Figure 9
[2]
VCC = 1.65 V to 1.95 V
1.5
5.0
12.9
1.5
12.9
ns
VCC = 2.3 V to 2.7 V
1.0
3.5
7.0
1.0
7.0
ns
VCC = 2.7 V
1.0
3.5
7.0
1.0
7.0
ns
VCC = 3.0 V to 3.6 V
1.0
3.0
5.9
1.0
5.9
ns
VCC = 4.5 V to 5.5 V
1.0
2.5
4.1
1.0
4.1
ns
tW
pulse width
CP HIGH or LOW;
see Figure 8
VCC = 1.65 V to 1.95 V
6.2
-
-
6.2
-
ns
VCC = 2.3 V to 2.7 V
2.7
-
-
2.7
-
ns
VCC = 2.7 V
2.7
-
-
2.7
-
ns
VCC = 3.0 V to 3.6 V
2.7
1.3
-
2.7
-
ns
VCC = 4.5 V to 5.5 V
2.0
-
-
2.0
-
ns
SD and RDLOW;
see Figure 9
VCC = 1.65 V to 1.95 V
6.2
-
-
6.2
-
ns
VCC = 2.3 V to 2.7 V
2.7
-
-
2.7
-
ns
VCC = 2.7 V
2.7
-
-
2.7
-
ns
VCC = 3.0 V to 3.6 V
2.7
1.6
-
2.7
-
ns
VCC = 4.5 V to 5.5 V
2.0
-
-
2.0
-
ns


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