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FM24CL64B-GATR 数据表(PDF) 10 Page - Cypress Semiconductor |
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FM24CL64B-GATR 数据表(HTML) 10 Page - Cypress Semiconductor |
10 / 13 page FM24CL64B - Automotive Temp. Document Number: 001-84457 Rev. *A Page 10 of 13 AC Test Conditions Equivalent AC Test Load Circuit Input Pulse Levels 0.1 VDD to 0.9 VDD Input rise and fall times 10 ns Input and output timing levels 0.5 VDD Diagram Notes All start and stop timing parameters apply to both read and write cycles. Clock specifications are identical for read and write cycles. Write timing parameters apply to slave address, word address, and write data bits. Functional relationships are illustrated in the relevant datasheet sections. These diagrams illustrate the timing parameters only. Read Bus Timing t SU:SDA Start t R ` t F Stop Start t BUF t HIGH 1/fSCL t LOW t SP t SP Acknowledge t HD:DAT t SU:DAT t AA t DH SCL SDA Write Bus Timing t SU:STO Start Stop Start Acknowledge t AA t HD:DAT t HD:STA t SU:DAT SCL SDA Data Retention (VDD = 3.0V to 3.6V) Parameter Min Max Units Notes Data Retention @ TA = +55 C @ TA = +105 C @ TA = +125 C 17 10,000 1,000 - - - Years Hours Hours Note : Data retention qualification tests are accelerated tests and are performed such that all three conditions have been applied : (1) 17 years at a temperature of +55 C, (2) 10,000 hours at +105 C, and (3) 1,000 hours at +125 C. Typical Grade 1 Operating Profile 0 200 400 600 800 1000 1200 1400 1600 70 75 80 85 90 95 100 105 110 115 120 125 Temperature (°C) Typical Grade 1 Storage Profile 0 5000 10000 15000 20000 25000 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 Temperature (°C) 3.6V Output 1.8 Kohm 100 pF |
类似零件编号 - FM24CL64B-GATR |
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类似说明 - FM24CL64B-GATR |
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