© 2000 Fairchild Semiconductor Corporation

DS006192

www.fairchildsemi.com

September 1986

Revised February 2000

DM74ALS37A

Quadruple 2-Input NAND Buffer

General Description

This device contains four independent gates, each of which

performs the logic NAND function.

Features

s Switching specifications at 50 pF

s Switching specifications guaranteed over full tempera-

s Advanced oxide-isolated, ion-implanted Schottky TTL

process

s Functionally and pin for pin compatible with LS TTL

counterpart

s Improved AC performance over LS37

s Improved line receiving characteristics

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Y

= AB

H

= HIGH Logic Level

L

= LOW Logic Level

Order Number

Package Number

Package Description

DM74ALS37AM

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

DM74ALS37AN

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Inputs

Output

AB

Y

LL

H

LH

H

HL

H

HH

L