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CD4052BCM 数据表(PDF) 1 Page - Fairchild Semiconductor |
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CD4052BCM 数据表(HTML) 1 Page - Fairchild Semiconductor |
1 / 13 page © 2000 Fairchild Semiconductor Corporation DS005662 www.fairchildsemi.com November 1983 Revised August 2000 CD4051BC • CD4052BC • CD4053BC Single 8-Channel Analog Multiplexer/Demultiplexer • Dual 4-Channel Analog Multiplexer/Demultiplexer • Triple 2-Channel Analog Multiplexer/Demultiplexer General Description The CD4051BC, CD4052BC, and CD4053BC analog mul- tiplexers/demultiplexers are digitally controlled analog switches having low “ON” impedance and very low “OFF” leakage currents. Control of analog signals up to 15Vp-p can be achieved by digital signal amplitudes of 3 −15V. For example, if VDD = 5V, VSS = 0V and VEE = −5V, analog sig- nals from −5V to +5V can be controlled by digital inputs of 0 −5V. The multiplexer circuits dissipate extremely low qui- escent power over the full VDD−VSS and VDD−VEE supply voltage ranges, independent of the logic state of the control signals. When a logical “1” is present at the inhibit input ter- minal all channels are “OFF”. CD4051BC is a single 8-channel multiplexer having three binary control inputs. A, B, and C, and an inhibit input. The three binary signals select 1 of 8 channels to be turned “ON” and connect the input to the output. CD4052BC is a differential 4-channel multiplexer having two binary control inputs, A and B, and an inhibit input. The two binary input signals select 1 or 4 pairs of channels to be turned on and connect the differential analog inputs to the differential outputs. CD4053BC is a triple 2-channel multiplexer having three separate digital control inputs, A, B, and C, and an inhibit input. Each control input selects one of a pair of channels which are connected in a single-pole double-throw configu- ration. Features s Wide range of digital and analog signal levels: digital 3 – 15V, analog to 15Vp-p s Low “ON” resistance: 80 Ω (typ.) over entire 15V p-p signal-input range for VDD − VEE = 15V s High “OFF” resistance: channel leakage of ±10 pA (typ.) at V DD − VEE = 10V s Logic level conversion for digital addressing signals of 3 – 15V (VDD − VSS = 3 – 15V) to switch analog signals to 15 Vp-p (VDD − VEE = 15V) s Matched switch characteristics: ∆R ON = 5Ω (typ.) for VDD − VEE = 15V s Very low quiescent power dissipation under all digital-control input and supply conditions: 1 µ W (typ.) at V DD − VSS = VDD − VEE = 10V s Binary address decoding on chip Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Order Number Package Number Package Description CD4051BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow CD4051BCSJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide CD4051BCMTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide CD4051BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide CD4052BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow CD4052BCSJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide CD4052BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide CD4053BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow CD4053BCSJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide CD4053BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
类似零件编号 - CD4052BCM |
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类似说明 - CD4052BCM |
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