74HC74D-T datasheet(10/22 Pages) NXP

部件名	74HC74D-T

功能描述	Dual D-type flip-flop with set and reset; positive-edge trigger

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制造商	NXP [NXP Semiconductors]

网页	http://www.nxp.com

标志

10 / 22 page

2003 Jul 10

10

Philips Semiconductors

Product speciﬁcation

Dual D-type ﬂip-ﬂop with set and reset;

positive-edge trigger

74HC74; 74HCT74

AC CHARACTERISTICS

Family 74HC

GND = 0 V; tr =tf = 6 ns; CL =50pF.

SYMBOL

PARAMETER

TEST CONDITIONS

MIN.

TYP.

MAX.

UNIT

WAVEFORMS

VCC (V)

Tamb = −40 to +85 °C

tPHL/tPLH

propagation delay

nCP to nQ, nQ

see Fig.7

2.0

−

47

220

ns

4.5

−

17

44

ns

6.0

−

14

37

ns

propagation delay

nSD to nQ, nQ

see Fig.8

2.0

−

50

250

ns

4.5

−

18

50

ns

6.0

−

14

43

ns

propagation delay

nRD to nQ, nQ

see Fig.8

2.0

−

52

250

ns

4.5

−

19

50

ns

6.0

−

15

43

ns

tTHL/tTLH

output transition time

see Fig.7

2.0

−

19

95

ns

4.5

−

719

ns

6.0

−

616

ns

tW

clock pulse width

HIGH or LOW

see Fig.7

2.0

100

19

−

ns

4.5

20

7

−

ns

6.0

17

6

−

ns

set or reset pulse width

LOW

see Fig.8

2.0

100

19

−

ns

4.5

20

7

−

ns

6.0

17

6

−

ns

trem

removal time set or

reset

see Fig.8

2.0

40

3

−

ns

4.5

8

1

−

ns

6.0

7

1

−

ns

tsu

set-up time nD to nCP

see Fig.7

2.0

75

6

−

ns

4.5

15

2

−

ns

6.0

13

2

−

ns

th

hold time nCP to nD

see Fig.7

2.0

3

−6

−

ns

4.5

3

−2

−

ns

6.0

3

−2

−

ns

fmax

maximum clock pulse

frequency

see Fig.7

2.0

4.8

23

−

MHz

4.5

24

69

−

MHz

6.0

28

82

−

MHz

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NXP Semiconductors	74HC74D-T	125Kb / 22P	Dual D-type flip-flop with set and reset; positive-edge trigger 2003 Jul 10

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