Preliminary

3

www.fairchildsemi.com

Functional Description

The 74LVT32244 and 74LVTH32244 contain thirty-two

non-inverting buffers with 3-STATE outputs. The device is

nibble (4 bits) controlled with each nibble functioning identi-

cally, but independent of the other. The control pins can be

shorted together to obtain full 32-bit operation. The

high impedance mode but this does not interfere with

entering new data into the inputs.

Logic Diagrams

Byte 1

Byte 2

Byte 3

Byte 4

Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.