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74LCXH162244MEX 数据表(PDF) 3 Page - Fairchild Semiconductor |
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74LCXH162244MEX 数据表(HTML) 3 Page - Fairchild Semiconductor |
3 / 9 page 3 www.fairchildsemi.com Truth Tables H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Functional Description The LCXH162244 contains sixteen non-inverting buffers with 3-STATE standard outputs. The LCXH162244 data inputs include active bushold circuitry eliminating the need for pull-up resistors to hold unused or floating data inputs at a valid logic level. The devise is also designed with 26 : series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers and bus transceiver/transmitters. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The 3-STATE outputs are controlled by an Output Enable (OEn) input for each nibble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs. Logic Diagram Inputs Outputs Inputs Outputs OE1 I0–I3 O0–O3 OE3 I8–I11 O8–O11 LL L L L L LH H L H H HX Z H X Z Inputs Outputs Inputs Outputs OE2 I4–I7 O4–O7 OE4 I12–I15 O12–O15 LL L L L L LH H L H H HX Z H X Z |
类似零件编号 - 74LCXH162244MEX |
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类似说明 - 74LCXH162244MEX |
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