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74LCX821WM 数据表(PDF) 1 Page - Fairchild Semiconductor |
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74LCX821WM 数据表(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2001 Fairchild Semiconductor Corporation DS012635 www.fairchildsemi.com January 1996 Revised March 2001 74LCX821 Low Voltage 10-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs General Description The LCX821 consists of ten D-type Flip-Flops with 3-STATE outputs for bus organized system applications. The device is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The LCX821 is fabricated with an advanced CMOS tech- nology to achieve high speed operation while maintaining CMOS low power dissipation. Features s 5V tolerant inputs and outputs s 2.3V–3.6V VCC specifications provided s 7.0 ns tPD max (VCC = 3.3V), 10 µA ICC max s Power-down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s ±24 mA output drive (V CC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human Body Model > 2000V Machine Model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Order Number Package Number Package Description 74LCX821WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LCX821MSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74LCX821MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
类似零件编号 - 74LCX821WM |
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类似说明 - 74LCX821WM |
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