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74F398 数据表(PDF) 3 Page - Fairchild Semiconductor |
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74F398 数据表(HTML) 3 Page - Fairchild Semiconductor |
3 / 9 page 3 www.fairchildsemi.com Functional Description The 74F398 and 74F399 are high-speed quad 2-port regis- ters. They select four bits of data from either of two sources (Ports) under control of a common Select input (S). The selected data is transferred to a 4-bit output register syn- chronous with the LOW-to-HIGH transition of the Clock input (CP). The 4-bit D-type output register is fully edge- triggered. The Data inputs (I0x, I1x) and Select input (S) must be stable only a setup time prior to and hold time after the LOW-to-HIGH transition of the Clock input for predict- able operation. The 74F398 has both Q and Q outputs. Function Table H = HIGH Voltage Level L = LOW Voltage Level h = HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock transition I = LOW Voltage Level one setup time prior to the LOW-to-HIGH clock transition X = Immaterial Note 1: 74F398 only Logic Diagram *F398 Only Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Inputs Outputs SI0 I1 QQ (Note 1) II X L H Ih X H L hX I L H hX h H L |
类似零件编号 - 74F398 |
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类似说明 - 74F398 |
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