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74F175SJ 数据表(PDF) 1 Page - Fairchild Semiconductor |
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74F175SJ 数据表(HTML) 1 Page - Fairchild Semiconductor |
1 / 7 page © 2000 Fairchild Semiconductor Corporation DS009490 www.fairchildsemi.com April 1988 Revised September 2000 74F175 Quad D-Type Flip-Flop General Description The 74F175 is a high-speed quad D-type flip-flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW-to-HIGH clock transition. Both true and complemented outputs of each flip-flop are provided. A Master Reset input resets all flip-flops, inde- pendent of the Clock or D inputs, LOW. Features s Edge-triggered D-type inputs s Buffered positive edge-triggered clock s Asynchronous common reset s True and complement output Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Order Number Package Number Package Description 74F175SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F175SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F175PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
类似零件编号 - 74F175SJ |
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类似说明 - 74F175SJ |
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