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74ACTQ823 数据表(PDF) 4 Page - Fairchild Semiconductor |
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74ACTQ823 数据表(HTML) 4 Page - Fairchild Semiconductor |
4 / 7 page www.fairchildsemi.com 4 DC Electrical Characteristics for ACTQ (Continued) Note 7: Max number of data inputs (n) switching. (n − 1) inputs switching 0V to 3V Input-under-test switching: 3V to threshold (V ILD), 0V to threshold (VIHD), f = 1 MHz. AC Electrical Characteristics Note 8: Voltage Range 5.0 is 5.0V ±0.5V. Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design. Not tested. AC Operating Requirements Note 10: Voltage Range 5.0 is 5.0V ±0.5V Capacitance VCC TA = +25°C TA = −40°C to +85°C Symbol Parameter (V) CL = 50 pF CL = 50 pF Units (Note 8) Min Typ Max Min Max tPLH Propagation Delay 5.0 2.0 7.0 9.0 2.0 10.0 ns tPHL CP to On tPLH Propagation Delay 5.0 2.0 7.0 9.0 2.0 10.0 ns tPHL CLR to On tPZH Output Enable Time 5.0 2.5 8.0 10.0 2.5 11.0 ns tPZL OE to On tPHZ Output Disable Time 5.0 1.0 6.0 8.0 1.0 9.0 ns tPLZ OE to On tOSLH Output to Output 5.0 0.5 1.0 1.0 ns tOSHL Skew Dn to On (Note 9) VCC TA = +25°CTA = −40°C to +85°C Symbol Parameter (V) CL = 50 pF CL = 50 pF Units (Note 10) Typ Guaranteed Minimum tS Setup Time, HIGH or LOW 5.0 0.5 3.0 3.0 ns D to CP tH Hold Time, HIGH or LOW 5.0 0 1.5 1.5 ns Dn to CP tS Setup Time, HIGH or LOW 5.0 0 3.0 3.0 ns EN to CP tH Hold Time, HIGH or LOW 5.0 0 1.5 1.5 ns EN to CP tW CP Pulse Width 5.0 2.5 4.0 4.0 ns HIGH or LOW tW CLR Pulse Width, LOW 5.0 3.0 4.0 ns trec CLR to CP 5.0 1.5 3.5 4.0 ns Recovery Time Symbol Parameter Typ Units Conditions CIN Input Capacitance 4.5 pF VCC = OPEN CPD Power Dissipation Capacitance 54 pF VCC = 5.0V |
类似零件编号 - 74ACTQ823 |
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类似说明 - 74ACTQ823 |
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