© 1999 Fairchild Semiconductor Corporation

DS0500292

www.fairchildsemi.com

August 1999

Revised October 1999

74ACT18825

18-Bit Buffer/Line Driver with 3-STATE Outputs

General Description

The ACT18825 contains eighteen non-inverting buffers

with 3-STATE outputs designed to be employed as a mem-

ory and address driver, clock driver, or bus oriented trans-

mitter/receiver. The device is byte controlled. Each byte

has separate 3-STATE control inputs which can be shorted

together for full 18-bit operation.

Features

s Broadside pinout allows for easy board layout

s Separate control logic for each byte

s Extra data width for wider address/data paths or buses

carrying parity

s Outputs source/sink 24 mA

s TTL-compatible inputs

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Connection Diagram

FACT

™, FACT Quiet Series™ and GTO™ are trademarks of Fairchild Semiconductor Corporation.

Order Number

Package Number

Package Description

74ACT18825SSC

MS56A

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide

74ACT18825MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Pin Names

Description

Output Enable Input (Active LOW)

Inputs

Outputs