© 2005 Fairchild Semiconductor Corporation

DS011664

www.fairchildsemi.com

March 1994

Revised March 2005

74ABT240

Octal Buffer/Line Driver with 3-STATE Outputs

General Description

The ABT240 is an inverting octal buffer and line driver

designed to be employed as a memory address driver,

clock driver and bus oriented transmitter or receiver which

provides improved PC board density.

Features

s Output sink capability of 64 mA, source capability of

32 mA

s Guaranteed latchup protection

s High impedance glitch free bus loading during entire

power up and power down cycle

s Nondestructive hot insertion capability

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Connection Diagram

Pin Descriptions

Truth Tables

H

HIGH Voltage Level

L

LOW Voltage Level

X

Immaterial

Z

High Impedance

Order Number

Package Number

Package Description

74ABT240CSC

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74ABT240CSJ

M20D

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74ABT240CMSA

MSA20

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74ABT240CMTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Names

Description

3-STATE Output

Enable Inputs

Inputs

Outputs

Inputs

Outputs

(Pins 12, 14, 16, 18)

LL

H

LH

L

HX

Z

Inputs

Outputs

(Pins 3, 5, 7, 9)

LL

H

LH

L

HX

Z