TPD5E003 datasheet(2/10 Pages) TI

部件名	TPD5E003

功能描述	Five Channel Space Saving ESD Protection Device

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制造商	TI [Texas Instruments]

网页	http://www.ti.com

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2 / 10 page

TPD5E003

SLVSBQ6A – DECEMBER 2012 – REVISED JANUARY 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

APPLICATION/FUNCTIONAL BLOCK DIAGRAM

PIN FUNCTIONS

PIN NAME

DPF

PIN TYPE

DESCRIPTION

I/O

1, 3, 4, 5, 6

I/O

ESD Protected channel

GND

2

GND

Ground

ABSOLUTE MAXIMUM RATINGS

MIN

MAX

UNIT

IO voltage tolerance

5.5

V

Operating temperature range

-40

125

°C

Storage temperature

-55

150

°C

IEC 61000-4-2 contact ESD

±15

kV

IEC 61000-4-2 air-gap ESD

±15

kV

IPP, peak pulse current (tp = 8/20μs)

3

A

PPP, peak pulse power (tp = 8/20μs)

40

W

ELECTRICAL CHARACTERISTICS

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

VRWM

Reverse stand-off voltage

II = 0.1 µA

5.0

V

ILEAK

Leakage Current

Pin 1, 3, 4, 5, or 6 = 5V, Pin 2 = 0V

10

100

nA

IPP = 6A, TLP, Dx pin to GND, TA = 25 °C

13

15.6

V

VClamp

Clamp voltage with ESD strike

IPP = 10 A, TLP, Dx pin to GND, TA = 25 °C

16.3

19.5

V

ITLP = 6A to 10 A, Dx pin to GND, TA = 25

0.8

1

Ω

°C

RDYN

Dynamic resistance

ITLP = 6A to 10 A, GND to Dx pin, TA = 25

0.3

0.4

Ω

°C

VIO = 2.5V, 1 MHz, TA = 25 °C

5.6

7

8.4

pF

CIO

IO capacitance

VIO = 0V, 1 MHz, TA = 25 °C

8

10

12

pF

VBR

Break-down voltage

IIO = 1 mA

6.0

7

8.5

V

2

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