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AD7628TQ 数据表(PDF) 3 Page - Analog Devices

部件名 AD7628TQ
功能描述  CMOS Dual 8-Bit Buffered Multiplying DAC
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7628TQ 数据表(HTML) 3 Page - Analog Devices

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AD7628
–3–
REV. A
ABSOLUTE MAXIMUM RATINGS
(TA = +25°C unless otherwise noted)
VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, +17 V
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, +17 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . VDD + 0.3 V
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . VDD + 0.3 V
Digital Input Voltage to DGND . . . . . . –0.3 V, VDD + 0.3 V
VPIN2, VPIN20 to AGND . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
VREF A, VREF B to AGND . . . . . . . . . . . . . . . . . . . . . . .
±25 V
VRFB A, VRFB B to AGND . . . . . . . . . . . . . . . . . . . . . . . ± 25 V
Power Dissipation (Any Package) to +75
°C . . . . . . . . 450 mW
Derates above +75
°C by . . . . . . . . . . . . . . . . . . . 6 mW/°C
Operating Temperature Range
Commercial (K) Grades . . . . . . . . . . . . . . . –40
°C to +85°C
Industrial (B) Grades . . . . . . . . . . . . . . . . . –40
°C to +85°C
Extended (T) Grades . . . . . . . . . . . . . . . . –55
°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300
°C
ORDERING GUIDE
Temperature
Relative
Gain
Package
Model
1
Range
Accuracy Error
Option
2
AD7628KN
–40
°C to +85°C
±1/2 LSB ±2 LSB
N-20
AD7628KP
–40
°C to +85°C
±1/2 LSB ±2 LSB
P-20A
AD7628KR
–40
°C to +85°C
±1/2 LSB ±2 LSB
R-20
AD7628BQ
–40
°C to +85°C
±1/2 LSB ±2 LSB
Q-20
AD7628TQ
–55
°C to +125°C ±1/2 LSB ±2 LSB
Q-20
AD7628TE
–55
°C to +125°C ±1/2 LSB ±2 LSB
E-20A
NOTES
1To order MIL-STD-883, Class B process parts, add /883B to part number.
Contact your local sales office for military data sheet.
2E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip; R = SOIC.
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7628 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
TERMINOLOGY
Relative Accuracy:
Relative accuracy or endpoint nonlinearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after ad-
justing for zero and full-scale, and is normally expressed in
LSBs or as a percentage of full-scale reading.
Differential Nonlinearity:
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of
±1 LSB max over
the operating temperature range ensures monotonicity.
Gain Error:
Gain error is a measure of the output error between an ideal
DAC and the actual device output. It is measured with all 1s in
the DAC latches after offset error has been adjusted out. Gain
error of both DACs is adjustable to zero with external resistance.
Output Capacitance:
Capacitance from OUT A or OUT B to AGND.
Digital-to-Analog Glitch Impulse:
The amount of charge injected from the digital inputs to the
analog output when the inputs change state. This is normally
specified as the area of the glitch in either pA-secs or nV-secs,
depending upon whether the glitch is measured as a current or
voltage signal. Glitch impulse is measured with VREF A, VREF B
= AGND.
Channel-to-Channel Isolation:
The proportion of input signal from one DAC’s reference input
that appears at the output of the other DAC, expressed as a
ratio in dB.
Digital Crosstalk:
The glitch energy transferred to the output of one converter due
to a change in digital input code to the other converter. Speci-
fied in nV secs.
PIN CONFIGURATIONS
DIP, SOIC
AGND
OUT A
OUT B
RFB B
DGND
DAC A/DAC B
(MSB) DB7
WR
CS
DB0 (LSB)
RFB A
V
REF A
V
REF B
V
DD
DB6
DB1
DB5
DB2
DB4
DB3
1
2
20
19
5
6
7
16
15
14
3
4
18
17
813
912
10
11
TOP VIEW
(Not to Scale)
AD7628
LCCC
V
REF A
DGND
DB6
DAC A /DAC B
DB7 (MSB)
V
REF B
V
DD
DB0 (LSB)
WR
CS
19
31
220
4
5
8
6
7
12 13
911
10
18
17
14
16
15
TOP VIEW
(Not to Scale)
AD7628
PLCC
V
REF A
DGND
DB6
DAC A/DAC B
DB7 (MSB)
V
REF B
V
DD
DB0 (LSB)
WR
CS
19
3
1
2
20
4
5
8
6
7
12 13
9
11
10
18
17
14
16
15
TOP VIEW
(Not to Scale)
AD7628


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