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AD645C 数据表(PDF) 3 Page - Analog Devices

部件名 AD645C
功能描述  Low Noise, Low Drift FET Op Amp
Download  8 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD645C 数据表(HTML) 3 Page - Analog Devices

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AD645
–3–
REV. B
ORDERING GUIDE
Model
1
Temperature Range
Package Option
2
AD645JN
0
°C to +70°C
N-8
AD645KN
0
°C to +70°C
N-8
AD645AH
– 40
°C to +85°C
H-08A
AD645BH
– 40
°C to +85°C
H-08A
AD645CH
– 40
°C to +85°C
H-08A
AD645SH/883B
– 55
°C to +125°C
H-08A
NOTES
1Chips are also available.
2N = Plastic Mini-DIP; H = Metal Can.
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±18 V
Internal Power Dissipation
2 (@ T
A = +25°C)
8-Pin Header Package . . . . . . . . . . . . . . . . . . . . . . 500 mW
8-Pin Mini-DIP Package . . . . . . . . . . . . . . . . . . . . 750 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±V
S
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . . +VS and –VS
Storage Temperature Range (H) . . . . . . . . . –65
°C to +150°C
Storage Temperature Range (N) . . . . . . . . . –65
°C to +125°C
Operating Temperature Range
AD645J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
°C to +70°C
AD645A/B/C . . . . . . . . . . . . . . . . . . . . . . . –40
°C to +85°C
AD645S . . . . . . . . . . . . . . . . . . . . . . . . . . –55
°C to +125°C
Lead Temperature Range
(Soldering 60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +300
°C
NOTES
1Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational section of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability.
2Thermal Characteristics:
8-Pin Plastic Mini-DIP Package:
θ
JA = 100°C/Watt
8-Pin Header Package:
θ
JA = 200°C/Watt
800
700
600
400
300
200
100
0
500
INPUT OFFSET VOLTAGE – mV
–1.0
0.8
–0.4 –0.2 0.0
0.4
0.6
1.0
–0.6
0.2
–0.8
Figure 4. Typical Distribution of Input
Offset Voltage (1855 Units)
120
110
100
90
80
70
60
50
40
30
10
20
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
INPUT BIAS CURRENT – pA
Figure 5. Typical Distribution of Input
Bias Current (576 Units)
INPUT VOLTAGE NOISE –
µV p-p
25
20
15
10
5
0
0.4
1.0
1.2
1.4
1.6
1.8
0.6
0.8
Figure 6. Typical Distribution of 0.1 Hz
to 10 Hz Voltage Noise (202 Units)
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD645 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
AD645
10k
5
1
6
V
ADJUST
OS
3
+VS
7
2
–VS
4
Figure 3. AD645 Offset Null Configuration


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