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AD5551 数据表(PDF) 5 Page - Analog Devices |
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AD5551 数据表(HTML) 5 Page - Analog Devices |
5 / 12 page AD5551/AD5552 –5– REV. 0 AD5552 PIN FUNCTION DESCRIPTIONS Mnemonic Pin No. Description RFB 1 Feedback Resistor. In bipolar mode connect this pin to external op amp output. VOUT 2 Analog Output Voltage from the DAC. AGNDF 3 Ground Reference Point for Analog Circuitry (Force). AGNDS 4 Ground Reference Point for Analog Circuitry (Sense). VREFS 5 This is the voltage reference input (sense) for the DAC. Connect to external reference ranges from 2 V to VDD. VREFF 6 This is the voltage reference input (force) for the DAC. Connect to external reference ranges from 2 V to VDD. CS 7 This is an active low-logic input signal. The chip select signal is used to frame the serial data input. SCLK 8 Clock input. Data is clocked into the input register on the rising edge of SCLK. Duty cycle must be between 40% and 60%. NC 9 No Connect. DIN 10 Serial Data Input. This device accepts 14-bit words. Data is clocked into the input register on the rising edge of SCLK. LDAC 11 LDAC Input. When this input is taken low, the DAC register is simultaneously updated with the contents of the input register. DGND 12 Digital Ground. Ground reference for digital circuitry. INV 13 Connected to the Internal Scaling Resistors of the DAC. Connect INV pin to external op amps inverting input in bipolar mode. VDD 14 Analog Supply Voltage, 5 V ± 10%. TERMINOLOGY Relative Accuracy For the DAC, relative accuracy or integral nonlinearity (INL) is a measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. A typical INL versus code plot can be seen in TPC 1. Differential Nonlinearity Differential nonlinearity is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of ±1 LSB maximum ensures monotonicity. TPC 4 illustrates a typical DNL versus code plot. Gain Error Gain error is the difference between the actual and ideal analog output range, expressed as a percent of the full-scale range. It is the deviation in slope of the DAC transfer characteristic from ideal. Gain Error Temperature Coefficient This is a measure of the change in gain error with changes in temperature. It is expressed in ppm/ °C. Zero Code Error Zero code error is a measure of the output error when zero code is loaded to the DAC register. Zero Code Temperature Coefficient This is a measure of the change in zero code error with a change in temperature. It is expressed in mV/ °C. Digital-to-Analog Glitch Impulse Digital-to-analog glitch impulse is the impulse injected into the analog output when the input code in the DAC register changes state. It is normally specified as the area of the glitch in nV-s and is measured when the digital input code is changed by 1 LSB at the major carry transition. A plot of the glitch impulse is shown in TPC 14. Digital Feedthrough Digital feedthrough is a measure of the impulse injected into the analog output of the DAC from the digital inputs of the DAC, but is measured when the DAC output is not updated. CS is held high, while the CLK and DIN signals are toggled. It is specified in nV-s and is measured with a full-scale code change on the data bus, i.e., from all 0s to all 1s and vice versa. A typi- cal plot of digital feedthrough is shown in TPC 13. Power Supply Rejection Ratio This specification indicates how the output of the DAC is affected by changes in the power supply voltage. Power-supply rejection ratio is quoted in terms of % change in output per % change in VDD for full-scale output of the DAC. VDD is varied by ±10%. Reference Feedthrough This is a measure of the feedthrough from the VREF input to the DAC output when the DAC is loaded with all 0s. A 100 kHz, 1 V p-p is applied to VREF. Reference feedthrough is expressed in mV p-p. |
类似零件编号 - AD5551 |
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类似说明 - AD5551 |
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