数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

LC72722PMS 数据表(PDF) 11 Page - Sanyo Semicon Device

部件名 LC72722PMS
功能描述  Single-Chip RDS Signal-Processing System IC
Download  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  SANYO [Sanyo Semicon Device]
网页  https://www.sanyo-av.com/us/
标志 SANYO - Sanyo Semicon Device

LC72722PMS 数据表(HTML) 11 Page - Sanyo Semicon Device

Back Button LC72722PMS Datasheet HTML 7Page - Sanyo Semicon Device LC72722PMS Datasheet HTML 8Page - Sanyo Semicon Device LC72722PMS Datasheet HTML 9Page - Sanyo Semicon Device LC72722PMS Datasheet HTML 10Page - Sanyo Semicon Device LC72722PMS Datasheet HTML 11Page - Sanyo Semicon Device LC72722PMS Datasheet HTML 12Page - Sanyo Semicon Device LC72722PMS Datasheet HTML 13Page - Sanyo Semicon Device LC72722PMS Datasheet HTML 14Page - Sanyo Semicon Device LC72722PMS Datasheet HTML 15Page - Sanyo Semicon Device Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 18 page
background image
LC72722PMS
No. A2156-11/18
(7) Crystal oscillator frequency selection (1bit) : XS
XS = 0 : 4.332MHz (Initial value : XS = 0)
XS = 1 : 8.664MHz
(8) Demodulation circuit phase control (2bits) : PL0, PL1
PL0
PL1
Demodulation circuit phase control
0
0/1
 Normal operation  when ARI presence or absence is unclear.
1
0
If the circuit determines that the ARI signal is absent : 90
 phase
1
If the circuit determines that the ARI signal is present : 0
 phase
Initial values : PL0 = 0, PL1 = 1
Caution : 1. When PL0 is 0 (normal operation), the IC detects the presence or absence of the ARI signal and reproduces
the RDS data by automatically controlling the demodulation phase with respect to the reproduced carrier.
However, the initial phase following a synchronization reset is set by PL1.
2. If PL0 is set to 1, the demodulation circuit phase is locked according to the PL1 setting at either 90
 (PL1 = 0) or
0
 (PL1 = 1), allowing RDS data to be reproduced. When ARI is not present, PL1 should be set to 0, since the
RDS data is reproduced by detecting at a phase of 90
 with respect to the reproduced carrier. When ARI is present,
PL1 should be set to 1, since detection is at 0
. In cases where the ARI presence is known in advance, more stable
reproduction can be achieved by fixing the demodulation phase in this manner.
(9) RDS/RBDS(MMBS) selection (1bit) : RM
RM
RBDS
Decoding method
0
None
Only RDS data is decoded correctly (Offset word E is not detected.)
1
Provided
RDS and MMBS data is decoded correctly (Offset word E is also detected.)
Initial value : RM=0
(10) Output pin settings (3bits) : PT0 to PT2
These bits control the T3, T4, T5, T6, T7, SYNC, and RDS-ID pins
MODE
P
T
0
P
T
1
P
T
2
T3
T4
T5
T6
T7
RDCL
RDDA
RSFT
ERROR
57K
TP
BE1
CORREC
ARI-ID
TA
BE0
0
0
0
0










1
1
0
0









2
0
1
0





3
1
1
0





4
0
0
1









5
1
0
1







6
0
1
1





7
1
1
1





 : open, ,  : Output enabled ( = reverse polarity)
Initial value : PT0 = 1, PT1 = 1, PT2 = 0 (Mode 3)
Caution : 1. When PT2 is set to 1, the polarity of the T6(ERROR/57K/TP), T7(CORREC/ARI-ID/TA), SYNC,
and RDS-ID pins changes to active high.
2. The output pins (T3 to T7, SYNC, and RDS-ID) are all open-drain pins, and require external pull-up resistors
to output data.
Mode1 (PT2 = 0)
Pin T6 (TP)
TP = 0 detected
High (1)
TP = 1 detected
Low (0)
TP = Traffic program code


类似零件编号 - LC72722PMS

制造商部件名数据表功能描述
logo
ON Semiconductor
LC72722PMS ONSEMI-LC72722PMS Datasheet
171Kb / 18P
   Signal-Processing System IC
June, 2013
More results

类似说明 - LC72722PMS

制造商部件名数据表功能描述
logo
Sanyo Semicon Device
LC72722PM SANYO-LC72722PM_12 Datasheet
174Kb / 18P
   Single-Chip RDS Signal-Processing System IC
72720YV SANYO-72720YV Datasheet
222Kb / 14P
   Single-Chip RDS Signal-Processing System IC
LC72720YV SANYO-LC72720YV Datasheet
173Kb / 18P
   Single-Chip RDS Signal-Processing System IC
LC72720YVS SANYO-LC72720YVS Datasheet
166Kb / 18P
   Single-Chip RDS Signal-Processing System IC
LC72720 SANYO-LC72720 Datasheet
235Kb / 14P
   Single-Chip RDS Signal-Processing System LSI
LC72722 SANYO-LC72722 Datasheet
114Kb / 15P
   Single-Chip RDS Signal-Processing System LSI
LC72720N SANYO-LC72720N Datasheet
214Kb / 14P
   Single-Chip RDS Signal-Processing System LSI
72722PM SANYO-72722PM_11 Datasheet
283Kb / 15P
   Single-Chip RDS Signal-Processing System LSI
logo
ON Semiconductor
LC72720YV ONSEMI-LC72720YV Datasheet
176Kb / 18P
   Signal-Processing System IC
June, 2013
LC72720YVS ONSEMI-LC72720YVS Datasheet
171Kb / 18P
   Signal-Processing System IC
June, 2013
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com