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LC75808W 数据表(PDF) 6 Page - Sanyo Semicon Device |
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LC75808W 数据表(HTML) 6 Page - Sanyo Semicon Device |
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6 / 38 page  LC75808W No.6370-6/38 Pin Functions Symbol Pin No. Function Active I/O Handling when unused S1 to S60 1 to 60 Segment driver outputs. - O OPEN COM1 to COM10 70 to 61 Common driver outputs. - O OPEN KS1 to KS6 71 to 76 Key scan outputs. Although normal key scan timing lines require diodes to be inserted in the timing lines to prevent shorts, since these outputs are unbalanced CMOS transistor outputs, these outputs will not be damaged by shorting when these outputs are used to form a key matrix. - O OPEN KI1 to KI5 77 to 81 Key scan inputs. These pins have built-in pull-down resistors. H I GND P1 to P4 82 to 85 General-purpose output ports. - O OPEN OSC 95 Oscillator connection. An oscillator circuit is formed by connecting an external resistor and capacitor at this pin. - I/O VDD CE 98 H I CL 99 I DI 100 - I GND DO 97 Serial data interface connections to the controller. Note that DO, being an open- drain output, requires a pull-up resistor. CE: Chip enable CL: Synchronization clock DI: Transfer data DO: Output data - O OPEN INH 96 Input that turns the display off, disables key scanning, and forces the general-purpose output ports low. • When INH is low (VSS): • Display off S1 to S60 = “L” (VLCD4). COM1 to COM10 = “L” (VLCD4). • General-purpose output ports P1 to P4 = low (VSS) • Key scanning is disabled: KS1 to KS6 = low (VSS) • All the key data is reset to low. • When INH is high (VDD): • Display on • The states of the general-purpose output ports can be set by the PC1 to PC4 control data. • Key scanning is enabled. However, serial data can be transferred when the INH pin is low. L I VDD TEST 94 This pin must be connected to ground. - I - VLCD0 88 LCD drive 4/4 bias voltage (high level) supply pin. The level on this pin can be changed by the display contrast adjustment circuit. However, (VLCD0 - VLCD4) must be greater than or equal to 4.5V. Also, external power must not be applied to this pin since the pin circuit includes the display contrast adjustment circuit. - O OPEN VLCD1 89 LCD drive 3/4 bias voltage (middle level) supply pin. This pin can be used to supply the 3/4 (VLCD0 - VLCD4) voltage level externally. - I OPEN VLCD2 90 LCD drive 2/4 bias voltage (middle level) supply pin. This pin can be used to supply the 2/4 (VLCD0 - VLCD4) voltage level externally. - I OPEN VLCD3 91 LCD drive 1/4 bias voltage (middle level) supply pin. This pin can be used to supply the 1/4 (VLCD0 - VLCD4) voltage level externally. - I OPEN VLCD4 92 LCD drive 0/4 bias voltage (low level) supply pin. Fine adjustment of the display contrast can be implemented by connecting an external variable resistor to this pin. However, (VLCD0 - VLCD4) must be greater than or equal to 4.5V, and VLCD4 must be in the range 0 V to 1.5V, inclusive. - I GND VDD 86 Logic block power supply connection. Provide a voltage of between 4.5 and 6.0V. - - - VLCD 87 LCD driver block power supply connection. Provide a voltage of between 7.0 and 11.0V when the display contrast adjustment circuit is used and provide a voltage of between 4.5 and 11.0V when the circuit is not used. - - - VSS 93 Power supply connection. Connect to ground. - - - |
类似零件编号 - LC75808W |
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类似说明 - LC75808W |
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