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74LVT374WM 数据表(PDF) 2 Page - Fairchild Semiconductor

部件名 74LVT374WM
功能描述  Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
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制造商  FAIRCHILD [Fairchild Semiconductor]
网页  http://www.fairchildsemi.com
标志 FAIRCHILD - Fairchild Semiconductor

74LVT374WM 数据表(HTML) 2 Page - Fairchild Semiconductor

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©1999 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LVT374, 74LVTH374 Rev. 1.5.0
2
Connection Diagram
Pin Description
Functional Description
The LVT374 and LVTH374 consist of eight edge-
triggered flip-flops with individual D-type inputs and
3-STATE true outputs. The buffered clock and buffered
Output Enable are common to all flip-flops. The eight flip-
flops will store the state of their individual D inputs that
meet the setup and hold time requirements on the LOW-
to-HIGH Clock (CP) transition. With the Output Enable
(OE) LOW, the contents of the eight flip-flops are avail-
able at the outputs. When the OE is HIGH, the outputs
go to the high impedance state. Operation of the OE
input does not affect the state of the flip-flops.
Logic Symbols
IEEE/IEC
Truth Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
Z
= High Impedance
= LOW-to-HIGH Transition
Oo = Previous Oo before HIGH-to-LOW of CP
Pin Names
Description
D0–D7
Data Inputs
CP
Clock Pulse Input
OE
3-STATE Output Enable Input
O0–O7
3-STATE Outputs
Inputs
Outputs
Dn
CP
OE
On
HL
H
LL
L
XL
L
Oo
XX
H
Z


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